A Shanghai-based chip company that supplies products to Innolight is pushing forward with its IPO plan, and intends to raise 3 billion yuan.

Following Enflame Technology and Core Advanced, another chip enterprise is pushing for an A-share IPO.

Gelonghui has learned that recently, Jiyiwei Semiconductor (Shanghai) Co., Ltd. (referred to as "Jiyiwei") released the reply to the inquiry letter on the review of the application documents for its initial public offering of shares and listing on the Sci-Tech Innovation Board, covering issues such as products and market competition, technological advancement and technology sources, and unprofitability, with Haitong Securities as the sponsor.

Jiyiwei is mainly engaged in the R&D, design and sales of high-speed interconnection chips, IP and related customized ASICs. Its products are widely used in fields such as artificial intelligence, data centers, network telecommunications and wireless base stations, and its customers include Innolight, NationalChip Technology, etc.

At the same time, Jiyiwei has also attracted institutional shareholders including China Mobile Industrial Chain Leader Fund, Alibaba Cloud, Tencent Venture Capital, etc. What is the background of this company?

01 Supplying to Innolight, with high concentration of suppliers and customers

Jiyiwei's revenue mainly comes from high-speed interconnection chips, customized ASICs, and high-speed interconnection IP licensing business, operating in the upstream and midstream of the integrated circuit industry.

The upstream of the integrated circuit industry includes EDA software, semiconductor IP, semiconductor production equipment and raw materials, with participants including Synopsys, Cadence, Siemens, Hua Da Jiu Tian, Empyrean, Arm, ASML, Applied Materials, Lam Research, Tokyo Electron, Advanced Micro-Fabrication Equipment Inc. China, Naura, Piotech, ACM Research Shanghai, Huahai Qingke, Coretronic Micro, KINGSEM, etc.

The midstream covers chip design, wafer manufacturing, packaging and testing, with participants including NVIDIA, Qualcomm, Broadcom, AMD, MediaTek, HiSilicon, Will Semiconductor, UNISOC, GigaDevice, Maxscend, Cambricon, Haiguang Information, TSMC, Samsung, SMIC, HuaHong Group, etc.

The downstream covers various terminal applications, including artificial intelligence, data centers, the Internet of Things, industrial control, consumer electronics, network communications, etc.

Division of labor in the integrated circuit industry chain, image from the prospectus

With high-speed SerDes technology as its underlying core, on the one hand, Jiyiwei vertically expands its high-speed interconnection chips and related customized ASIC business, and has successfully realized the industrialization of high-speed optical digital signal processing (oDSP) chips supporting 400G / 800G optical module applications, board-level Retimer chips supporting 400G / 800G Ethernet data transmission, and customized ASIC chips for home terminal gateways;

On the other hand, it deeply cultivates the high-speed interconnection IP licensing business, and has realized SerDes IP licensing from 56G per channel and 112G to the current highest commercial 224G rate in the industry, providing connection technology support for domestic high-end computing and network chips.

Specifically, from 2023 to the first half of 2026 (referred to as the "reporting period"), the revenue proportion of Jiyiwei's main chip sales business increased from 13.93% to 48.81%, the revenue proportion of high-speed interconnection IP licensing increased from 18.75% to 49.54%, and the revenue proportion of NRE and other businesses decreased from 67.32% to 1.65%.

Composition of the company's main business revenue, image source: prospectus

Jiyiwei adopts the Fabless business model, does not directly engage in production activities, and is mainly responsible for chip and IP design and product quality control. All chip production and processing links are outsourced. During the reporting period, the company mainly purchases wafers and outsourced services such as packaging and testing, and its suppliers include STATS ChipPAC, Jinglong Technology, Wuhan WeTest Technology, Hua Tian Technology, Synopsys EDA (China), etc.

During the reporting period, the purchase amount of the top five suppliers of the company's main raw materials and services accounted for 87.39%, 87.55%, 75.49% and 83.19% of the total purchase amount in the current period respectively, with high supplier concentration.

The company's customers are mainly leading manufacturers in the AI data center and XPU industry, as well as leading manufacturers of AI data center interconnection equipment, including Innolight, NationalChip Technology, Chengdu Nuclei System Technology, etc.

In each period of the reporting period, the sales amount of Jiyiwei to the top five customers accounted for 100%, 97.3%, 91.6% and 76.17% of the operating revenue in the current period respectively. Among them, the company's sales revenue to Customer B accounts for a relatively high proportion, and there are risks of high customer concentration and significant dependence on a single customer.

02 Peer of Broadcom and Montage Technology, with accumulated unrecovered losses in the past three years

In recent years, the overall industry where Jiyiwei is located has shown an expansion trend.

According to data from LightCounting, IPnest and Frost & Sullivan, the market sizes of Ethernet Retimer, optical module oDSP, customized ASIC and SerDes IP in China in 2025 were 20.2 billion yuan, 52.24 billion yuan, 634.9 billion yuan and 14.2 billion yuan respectively, and the compound annual growth rates from 2025 to 2030 are expected to be 48.05%, 19.09%, 33.53% and 25.4% respectively.

Image from the prospectus

Benefiting from the rising prosperity of the high-speed interconnection industry, the expansion of investment in downstream data centers and computing power infrastructure, and the expansion of procurement by key customers, Jiyiwei's revenue has shown a growing trend in recent years.

In the first half of 2023, 2024, 2025 and 2026, Jiyiwei's operating revenue was approximately 16 million yuan, 310 million yuan, 389 million yuan and 282 million yuan respectively, and the corresponding net profit was approximately -127 million yuan, -36.3991 million yuan, 12.6394 million yuan and 62.2183 million yuan respectively.

Due to the company's business being in the early stage of rapid development, high R&D investment and large share-based payment amount, Jiyiwei has accumulated unrecovered losses in the past three years. At the end of 2025 and the end of June 2026, the company's accumulated undistributed profits were -16.8642 million yuan and 45.3542 million yuan respectively.

The high-speed interconnection chip and IP market where Jiyiwei is located has high technical barriers and high market concentration.

The Ethernet Retimer chip market is dominated by overseas manufacturers, such as Broadcom, Marvell, Credo and Astera Lab, which account for more than 85% of the market share.

The global optical module oDSP chip market is highly concentrated, with Broadcom and Marvell forming a duopoly, accounting for as high as 80% of the total market share.

At present, in the domestic high-speed SerDes IP licensing market, overseas manufacturers represented by Synopsys, Alphawave, Cadence and Credo occupy more than 60% of the market share; local manufacturers such as Jiyiwei, Silink and Corerise IP are accelerating their catch-up.

In 2025, Jiyiwei's 56G per channel Retimer chip ranked fourth in the domestic market and first among domestic manufacturers in China. However, compared with international giants, the company still has a large gap in terms of operating scale, market coverage, product line richness and other aspects.

In addition, domestic integrated circuit design enterprises with the same production mode as Jiyiwei and comparable business include Montage Technology, Centec Networks, YTMC, and VeriSilicon.

Comparison of financial data between Jiyiwei and comparable companies in the same industry from January to June 2026; image from the prospectus

During the reporting period, Jiyiwei's comprehensive gross profit margin was 12.94%, 49%, 42.4% and 63.89% respectively, with certain fluctuations.

Among them, in 2023, the company's overall business was still in its initial stage, and the comprehensive gross profit margin was relatively low; since 2024, with the increase in the revenue proportion of businesses with relatively high gross profit margins such as high-speed interconnection IP licensing and customized ASICs, the comprehensive gross profit margin has been driven to rise, but it is still lower than the average of overseas peers.

Comparison of gross profit margins between the company and comparable companies in the same industry, image from the prospectus

Integrated circuit design is a technology-intensive industry, featuring fast iteration of design technology, large capital investment and long R&D cycle.

During the reporting period, Jiyiwei's R&D expense ratio was 776.38%, 59.42%, 40.14% and 36.46% respectively. As the company is still in the growth stage and its overall business scale is relatively small, the R&D expense ratio is generally higher than the average of peers, but it drops rapidly as the revenue scale expands.

03 Shanghai chip company pushes for IPO, plans to raise 3 billion yuan

Jiyiwei is registered in the Shanghai Pilot Free Trade Zone. Its predecessor, Jiyiwei Co., Ltd., was established in 2019 by Gao Zhenfa and Gao Haijin through joint capital contribution, and was restructured into a joint stock limited company as a whole in 2025.

Before this issuance, Jiyiwei's equity is relatively dispersed, with no controlling shareholder. ZHONG FREEMAN YINGQUAN and its concert parties (Gao Xiang, LEE SEUNG CHUL, Hangzhou Jicheng, Suzhou Xinyun) jointly control 34.5% of the voting rights corresponding to the company's shares, and are the actual controllers.

In addition, Hunan Huaye Tiancheng, China Mobile Industrial Chain Leader Fund, National Artificial Intelligence Fund, Alibaba Cloud, Shanghai Integrated Circuit Fund, Rongju Dingxin, Hangzhou Jixin, Tencent Venture Capital, etc. are all shareholders of the company.

As of the end of June 2026, Jiyiwei has a total of 184 employees, of whom more than 77% are R&D and technical personnel, management personnel account for about 18%, and there are a small number of sales personnel.

Professional structure of the company's employees at the end of June 2026; image from the prospectus

In terms of management, ZHONG FREEMAN YINGQUAN, Chairman of Jiyiwei, was born in 1960 and holds American nationality. He once pursued a bachelor's degree in the Department of Physics of Guangzhou Normal University (now Guangzhou University), a master's degree in Solid State Physics from the Department of Physics of Jinan University, and served as a lecturer at Jinan University. He also holds a master's degree in Electronic Engineering from San Jose State University in the United States, and served as a senior engineer at OTC Telecom and NEC Electronics, senior design manager and technical director of analog and mixed signals at Avago Technologies, and general manager of Shenzhen Qianhai Fangcheng Microelectronics Co., Ltd.

Director Gao Xiang was born in 1983, holding a bachelor's degree in Electronic Information Engineering from Zhejiang University, and a master's degree and doctorate in Integrated Circuit Design from the University of Twente in the Netherlands. He once served as chief engineer at Marvell Semiconductor and technical director at Credo Semiconductor. Since August 2018, he has successively served as a researcher and tenured associate professor at Zhejiang University.

Deputy General Manager LEE SEUNG CHUL was born in 1973 and holds South Korean nationality. He holds a bachelor's degree and a master's degree in Electronic Engineering from Sogang University in South Korea, and a doctorate in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign in the United States. He has successively served as a senior researcher at the Electronics and Telecommunications Research Institute of South Korea, chief engineer at Samsung Electronics Co., Ltd. of South Korea, and director of Shenzhen Qianhai Fangcheng Microelectronics Co., Ltd.

For this IPO, Jiyiwei plans to raise 3 billion yuan, which will be used for the R&D and industrialization project of high-speed interconnection communication chips for artificial intelligence and data center fields, the R&D and industrialization project of multi-scenario ASIC chips based on core IP of high-speed interconnection and data conversion, cutting-edge technology R&D projects, and supplementing working capital.

This article is from the WeChat official account "Gelonghui New Stocks", written by Fage Talks About New Stocks, and published by 36Kr with authorization.