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Is TSMC launching a new wave of factory construction? Six wafer fabs and five packaging plants.

半导体行业观察2026-09-29 10:18
TSMC is expanding its wafer fabs in the United States and ramping up advanced packaging capacity in Taiwan to meet the surging AI demand.

TSMC has already become an indispensable and crucial player in the semiconductor industry.

According to statistics from Counterpoint Research, TSMC's pure wafer foundry market share reached 71% in the second quarter of this year, further widening the gap with its followers. Counterpoint pointed out that TSMC's growth momentum mainly comes from the mass production of 2nm process, the continuous ramp-up of 3nm production capacity, as well as the undersupply of mature processes on 8-inch and 12-inch wafers and advanced packaging capacity, which gives TSMC stronger bargaining power and improves revenue visibility simultaneously.

Now, as major mobile phone manufacturers ramp up their efforts and the data center sector booms, the demand for chips with advanced processes has skyrocketed, which in turn drives TSMC to expand its capacity at a greater pace. The latest reports show that TSMC is not only expanding its existing fabs, but also constructing packaging plants.

Constructing Six More Wafer Fabs in the U.S.?

Citing recent news from the semiconductor equipment industrial chain, Taiwanese media reported that following Arizona, TSMC is evaluating the construction of its second large-scale manufacturing park in the United States, with a plan to build six more advanced wafer fabs, and the potential locations are pointed to Dallas and North Texas in Texas. If the relevant plan is finally implemented, TSMC will form two advanced manufacturing bases in Arizona and Texas in the United States, further improving the local semiconductor industrial chain.

Up to now, TSMC has not made an official response to this news. However, the recent news that "TSMC will build a new plant in Texas" has been circulating inside the semiconductor supply chain. Many supply chain manufacturers said they have indeed heard relevant discussions, but TSMC has not officially required suppliers to prepare for plant construction in advance, so the specific plan still has variables.

Behind TSMC's expansion of its U.S. footprint, one of the core driving forces is the continuous growing demand for AI and High Performance Computing (HPC). At present, TSMC's manufacturing base in Phoenix, Arizona, the United States, has increased its total investment scale to about 265 billion U.S. dollars, with plans to build six wafer fabs, two advanced packaging plants and a R&D center, aiming to build a complete manufacturing cluster covering wafer manufacturing, advanced packaging and R&D.

With the continuous improvement of AI accelerator performance, advanced process is no longer the only key factor, and the importance of 2.5D/3D advanced packaging such as CoWoS and technologies such as HBM is also getting higher and higher. For AI chip customers such as NVIDIA and AMD, closer supply chain collaboration needs to be formed between wafer manufacturing, advanced packaging and high-bandwidth storage. Therefore, while building advanced wafer fabs in the United States, TSMC is also gradually extending its advanced packaging capabilities to the local area.

The U.S. market is an important reason for TSMC to expand local manufacturing. U.S. enterprises such as Apple, NVIDIA, AMD and Qualcomm are all important customers of TSMC. As the United States continues to promote the localization of advanced chip manufacturing, customers' demand for local production capacity is increasing. At the same time, the uncertainty of U.S. trade policy and tariff policy also makes TSMC move closer to U.S. customers and the end market.

In terms of potential site selection, Dallas and North Texas have a relatively complete semiconductor industrial foundation. The local area has long been known as the "Silicon Prairie", and has formed industrial clusters including wafer manufacturing, semiconductor equipment, materials, optical communication and electronic manufacturing. Texas Instruments has a large-scale manufacturing base in the local area, Samsung has also deployed wafer fabs in Austin, and a large number of electronics, communication and high-tech enterprises are gathered around.

For TSMC, another attraction of Texas comes from energy, land and talent resources. Advanced wafer fabs belong to industries with high energy consumption and high water consumption, which require stable power supply, a large amount of industrial land and mature technical talents. With the rapid expansion of AI data centers, the pressure on power and infrastructure in some parts of the United States is rising, so energy supply capacity has also become an important factor in the site selection of advanced wafer fabs.

In contrast, TSMC's Arizona base has faced certain challenges in construction cost, labor, water, electricity and other infrastructure in recent years. Texas' advantages in land, energy and industrial talents make it an important candidate area when TSMC evaluates the second U.S. park.

If TSMC finally launches the second U.S. park, since the subsequent wafer fabs may adopt more advanced process nodes and be equipped with advanced packaging and R&D facilities, its total investment scale may exceed the current planned scale of about 265 billion U.S. dollars in Arizona.

However, the specific plan, investment amount and process nodes of the six wafer fabs have not been officially confirmed by TSMC. According to supply chain news, Dallas and North Texas may have entered the late stage of TSMC's site selection evaluation, but the final plan still needs to wait for the approval of TSMC's board of directors.

If the plan is finally implemented, TSMC's layout in the United States will gradually shift from a single manufacturing base to a regional industrial layout: Arizona will focus on developing advanced wafer manufacturing and advanced packaging, while Texas will form a new manufacturing core relying on the local mature semiconductor and industrial ecology. As a result, the U.S. advanced semiconductor supply chain may also further develop towards industrial clustering from "single-site plant construction".

Adding 5 New Packaging Plants in Taiwan of China

The demand for AI chips continues to grow, and advanced packaging is becoming another major focus of semiconductor industry capacity expansion after advanced processes. With the launch of the expansion plan of Chiayi Science Park, the semiconductor supply chain recently also spread the news that TSMC intends to further expand its Chiayi layout, and is evaluating adding 5 new advanced packaging plants in the third phase of Chiayi Science Park. If the relevant plan is finally implemented, the number of TSMC's advanced packaging plants in Chiayi will increase from the currently planned 5 to 10, further expanding the local AI advanced packaging industrial cluster.

On September 23, the Taiwan authorities of China announced the public information and opinion consultation procedure for the "Chiayi Park Expansion Plan (Phase II Expansion)", which is externally called "Chiayi Science Park Phase III". According to the plan, the expansion covers fields including artificial intelligence, heterogeneous packaging, silicon photonics, high-speed broadband networks, quantum technology and net zero, which mainly responds to the long-term industrial development and land demand. However, the relevant plan still needs to go through environmental assessment and subsequent deliberation, and has not been officially finalized yet.

According to the data from the Southern Science Park Administration, TSMC has planned two advanced packaging plants P1 and P2 in the first phase of Chiayi Park, which are expected to be mass-produced in 2027; three plants P3, P4 and P5 are planned in the second phase, among which P3 has started construction, and the second phase is expected to complete development in 2031. The supply chain recently spread the news that with the continuous increase of AI chip orders, TSMC is evaluating the construction of 5 more advanced packaging plants in the third phase, but the specific investment scale and product planning have not been confirmed by TSMC yet.

The core driving force of this round of capacity expansion still comes from the rapid growth of demand for advanced packaging such as CoWoS. Compared with traditional packaging, CoWoS integrates GPU, CPU, HBM and I/O chiplets into the same package through a silicon interposer, which can provide higher interconnection density and bandwidth, and reduce the data transmission delay and power consumption between chips. At present, GPU paired with HBM has become the mainstream architecture of AI accelerators, and the increase in the number of HBMs and the expansion of chip area also make advanced packaging an important bottleneck for AI chip production capacity.

TSMC's advanced packaging layout has actually been developed for more than ten years. In 2012, TSMC began mass production of CoWoS, which was mainly applied to FPGAs, network chips and high-performance computing products in the early stage. With the rapid development of generative AI, the demand for GPU and HBM has exploded, the importance of CoWoS has been greatly improved, and TSMC has also continued to expand production capacity and promote the upgrading of packaging technology.

At present, CoWoS has been evolving from the early solution to larger packaging sizes. TSMC has successively developed technologies such as CoWoS-S, CoWoS-R and CoWoS-L. Among them, CoWoS-L combines redistribution layers with local silicon interconnection, which can break through the size limit of traditional silicon interposers and is more suitable for large AI chips and multi-chiplet systems. At the same time, TSMC continues to promote 3D packaging technologies such as SoIC, realizing vertical stacking of chiplets through hybrid bonding, and incorporating CoWoS, SoIC and other technologies into the 3DFabric platform to provide a foundation for future Chiplet and heterogeneous integration.

It is worth noting that in addition to advanced packaging, the Chiayi expansion plan also lists silicon photonics as a key development direction. As the AI data center network evolves to 1.6T, 3.2T or even higher rates, traditional electrical interconnection faces power consumption and bandwidth pressure, and the importance of technologies such as silicon photonics and optoelectronic co-packaging is constantly increasing. The competition for AI chips in the future may also extend from the high-speed interconnection between GPU and HBM to the optical interconnection between chips and networks.

At the same time, the Baipu Industrial Park in Qiaotou, Kaohsiung has also started construction, which is positioned as a semiconductor advanced packaging material and equipment supply chain cluster, with plans for an AI advanced manufacturing base and an equipment and material verification base. The park covers an area of about 88.73 hectares, which is expected to be open for manufacturers to lease land and build plants in the first quarter of 2027, and complete the construction of standard factory buildings in the second quarter of 2029.

From Chiayi to Kaohsiung, southern Taiwan of China is forming an industrial chain of advanced manufacturing, packaging, equipment and materials centered on AI chips. For TSMC, the Chiayi capacity expansion is not only an extension of CoWoS production capacity, but also a preparation of manufacturing space in advance for larger size packaging, HBM4, Chiplet and future optoelectronic integrated packaging.

Final Remarks

Behind TSMC's continuous capacity expansion from wafer fabs to advanced packaging plants is the fact that AI is reshaping the industrial logic of semiconductor manufacturing.

With the growing demand for GPU, HBM, Chiplet and high-speed interconnection, the importance of advanced processes and advanced packaging is increasing simultaneously. The competition for chips in the future will no longer be just the competition of process nodes, but the comprehensive competition of wafer manufacturing, advanced packaging, storage, interconnection and other links.

For TSMC, the large-scale capacity layout in advance is essentially to seize the position in advance for the next round of AI chip demand. For the author, who can become TSMC's competitor will be an interesting question.

This article is from the WeChat Official Account "Semiconductor Industry Watch" (ID: icbank), written by the editorial department, and authorized for release by 36Kr.