Glass substrate, roadmap

Two years ago, Intel made a high-profile announcement that Glass Core Substrate (GCS) would become the core of next-generation advanced packaging, and planned to invest more than 1 billion US dollars to promote its industrialization.

Today, this technology has entered the final qualification stage, but real commercial products have not yet emerged. As Samsung, SKC, TSMC, and Japanese material enterprises have successively announced mass production plans, the competition for glass substrates has evolved from "who first proposed the concept" to "who can deliver first".

Judging from the currently public information, 2027-2030 will become a critical window period for the commercialization of glass substrates. This is not only a material upgrade, but also related to whether the ultra-large-size Chiplet, HBM and Co-Packaged Optics (CPO) in the AI era can continue to expand the packaging scale.

Why is the entire industry betting on glass?

Glass is not intended to replace silicon, but to replace the organic substrates widely used in current advanced packaging.

Over the past decade, GPUs, CPUs and HBM have continuously adopted the Chiplet architecture, and the packaging area has expanded rapidly. Taking NVIDIA as an example, the Blackwell packaging area is about 2739 square millimeters, and the next-generation Rubin Ultra is expected to reach 7470 square millimeters, which is almost equivalent to the silicon and HBM combination of nine reticle areas. Such a huge packaging size has approached the physical limit of organic substrates.

Previously released data from Intel shows that glass substrates can achieve an interconnection density of about 10 times, reduce pattern distortion by 50%, and reduce warpage by about 50%. Their coefficient of thermal expansion can be adjusted to 3–10 ppm/°C, which is closer to 2.6 ppm/°C of silicon itself. This means that after hundreds of thermal cycles, glass can maintain more stable dimensional accuracy and reduce the stress between Chiplet and HBM.

Another important change comes from rectangular panels. Traditional 300mm round wafers will produce a lot of waste at the edges when manufacturing ultra-large packages, while the utilization rate of 510×515mm rectangular glass panels can exceed 75%, significantly reducing the material cost of large-size packages. Therefore, glass substrates and Panel Level Packaging (PLP) are actually two highly related technical routes.

At the ECTC 2025 conference, a number of studies further verified the high-speed interconnection potential of glass. Researchers demonstrated Through Glass Vias (TGV) with a diameter of 6 microns and an aspect ratio of more than 15:1, and the Georgia Institute of Technology realized a stacked glass device with an operating frequency of 220GHz and an insertion loss of only 0.3dB, which provides an experimental basis for future optoelectronic hybrid packaging.

But for glass substrates, the biggest problem is not performance, but manufacturing. In other words, the biggest enemy of glass has never been electrical performance, but yield.

Compared with flexible organic materials, glass is naturally more brittle, and it is very prone to edge chipping and microcracks during drilling, cutting and handling. MIT Technology Review disclosed in March this year that during the early trial production stage of Absolics, hundreds of panels were scrapped within a few days due to glass breakage, and manufacturing stability once became the biggest challenge of the entire project.

In the past year, the industry chain has made a lot of breakthroughs. Through the edge coating process, the edge stress of glass has dropped from 95MPa to 49MPa; low-temperature dielectric materials can be cured below 180°C, reducing thermal stress during the packaging process; new cutting processes have also further reduced the probability of glass breakage.

But the truly difficult manufacturing problem has not been completely solved: how to complete the metallization of vias smaller than 10 microns on a half-meter-long glass panel while maintaining nanometer-level flatness. For large AI packages with more than 20 layers of RDL, any slight warpage will affect the subsequent lithography and bonding accuracy, so yield is still the core indicator that determines whether glass can be commercialized.

It is precisely for this reason that almost all manufacturers around the world are currently focusing on **Package Level Reliability (PLR)** verification, rather than directly announcing mass production.

Intel proposed it first, waiting for commercial implementation

In September 2023, Intel took the lead in publicly releasing the Glass Core Substrate (GCS) roadmap and defined it as the next-generation basic platform for advanced packaging. At that time, with the rapid popularization of Chiplet architecture and HBM, traditional organic substrates had begun to face problems such as warpage, insufficient dimensional stability, and limited interconnection density. Intel judged that the packaging area of AI processors will continue to expand in the future, and it is difficult to support next-generation products only by optimizing organic materials. Therefore, it decided to use glass as the core carrier, and announced to invest more than 1 billion US dollars to build R&D, trial production and manufacturing capabilities, with the goal of promoting glass substrates into mainstream mass production around 2030.

In the technical route at that time, glass did not exist in isolation, but together with Intel's EMIB bridge packaging, Foveros 3D stacking and future Co-Packaged Optics (CPO) formed a complete advanced packaging system. In other words, the glass substrate is regarded as the "foundation" for carrying the ultra-large Chiplet system, while EMIB and Foveros are responsible for completing the high-speed interconnection between chiplets.

After nearly two years of R&D, Intel now says that glass substrates have entered the **Final Qualification** stage. Earlier this year, the company first demonstrated a system-level engineering prototype packaged with a glass core substrate, and successfully launched the Windows operating system. This means that the glass substrate has completed the key nodes from material verification, packaging verification to system operation verification, proving that it can support the stable operation of complete systems such as CPU, memory, and high-speed I/O, and is no longer just a material sample in the laboratory.

At the NEPCON Japan exhibition held in January this year, Intel Foundry further unveiled its first physical thick-core glass substrate. The entire package size reaches 78×77 mm, with two layers of 800 micron glass core inside, two EMIB bridge chips are directly embedded in the glass, 10 layers of Redistribution Layer (RDL) are arranged on each side, and a silicon chip of about 1716 square millimeters is integrated on the top, which is close to the area of two complete reticles. Intel revealed that no microcracks were found in the sample during manufacturing, thermal cycling and reliability testing, which also verified the manufacturing feasibility of the hybrid package of glass core and EMIB.

However, proposing it first does not mean mass producing it first. In the past year, Intel's expression of glass substrates has obviously shifted from "product introduction" to "platform construction". Instead of directly announcing the commercial time, the company emphasizes patent layout, process standards and ecological cooperation, and hopes to build glass substrates as one of the advanced packaging capabilities provided by Intel Foundry. DigiTimes reported in July this year that Intel has discussed early packaging cooperation with Chinese glass manufacturer Lens Technology, but the two sides have not announced any substantive cooperation projects.

This also reflects the current reality of the glass substrate industry: the technology leader may not be the first to achieve mass production. TrendForce predicts that Intel's real large-scale commercial deployment will still be around 2030, and the first batch of products will most likely be oriented to data center CPUs, AI accelerators and co-packaged optical platforms, and before that, Korean manufacturers are expected to take the lead in completing the commercial verification of glass substrates.

Korean camp: Strive for mass production first in 2027

If Intel defines the technical direction of glass substrates, then the goal of Korean companies is more clear—to make glass substrates a business first.

In the past year, South Korea has taken three companies, Samsung Electro-Mechanics, SKC, and LG Innotek, as the core to build a complete industrial chain from glass materials, TGV processing, metallization to high-end substrate manufacturing, hoping to seize the right to speak in the next-generation advanced packaging supply chain. Unlike the United States which focuses more on platform technology, South Korea's competition focus is to take the lead in establishing stable mass production capabilities.

In February this year, Samsung Electro-Mechanics officially transferred the glass substrate project from the advanced R&D department to the business execution department, which usually means that the technology has completed the basic verification and started to enter the stage of customer introduction, equipment procurement and supply chain construction. For semiconductor material enterprises, the transfer from the R&D department to the business department is often an important node closest to commercialization.

Then on July 2, Samsung Electro-Mechanics and Dongwoo Fine-Chem, a subsidiary of Sumitomo Chemical, jointly established a joint venture GLASEM with a total investment of 482.1 billion won (about 310 million US dollars). The division of labor between the two sides is very clear: Samsung Electro-Mechanics is responsible for advanced substrate manufacturing and customer resources, and Dongwoo Fine-Chem provides glass materials and chemical processes, and jointly builds a dedicated production system for glass core substrates.

According to the plan, GLASEM will build a glass core production base in Pyeongtaek, South Korea, and start mass production in the second half of 2027. Its main processes include key manufacturing links such as glass drilling (TGV), via wall metallization, and glass core processing, and then supply the existing FC-BGA packaging production line of Samsung Electro-Mechanics to form an integrated manufacturing process from glass core to high-density substrate.

The reason why Samsung is considered to have competitive advantage is not only because of the glass technology itself, but also because it already has the world's leading FC-BGA and high-density packaging substrate production capacity. Once the glass core is mature, there is no need to re-establish the entire packaging system, and it can be directly imported into the existing production platform, greatly shortening the commercialization cycle. Korean media also reported that glass samples have been sent to customers such as AMD and Broadcom for evaluation, but the relevant companies have not publicly confirmed the adoption.

Another company worthy of more attention is Absolics under the SK Group.

Established in 2021, Absolics is the world's first new company dedicated to the industrialization of glass core substrates. Its factory in Covington, Georgia, USA has a total investment of about 600 million US dollars, including 75 million US dollars of funds from the U.S. CHIPS Act, and advanced packaging R&D projects jointly supported by the government and the Georgia Institute of Technology. Compared with competitors that are still in the pilot stage, Absolics has built a complete glass substrate production line with a first-phase designed production capacity of 12,000 square meters per year, which can theoretically correspond to about 2 million to 3 million H100-level AI packages.

In July this year, SKC disclosed the latest progress of the project for the first time at the financial report conference call: the embedded glass substrate samples produced by Absolics have been sent to Taiwan for **Package-Level Reliability (PLR)** certification. This is also the closest customer verification to commercial introduction in the public information around the world. Its test content covers thermal cycling, mechanical stress, damp heat aging and long-term packaging reliability, and the final result is expected to be announced at the end of this year.

If the certification is passed smoothly, Absolics plans to start mass production at the end of 2026, and is expected to become the world's first enterprise to realize commercial supply of glass core substrates. This also means that the first to enter the market may not be Intel, which first proposed the concept, but the Korean supply chain.

At the same time, LG Innotek is also advancing the third glass substrate route in Gumi, South Korea, and plans to enter the mass production stage in 2027-2028. So far, South Korea has formed an industrial layout of "three enterprises, three routes": Samsung Electro-Mechanics is responsible for high-end packaging substrates, Absolics focuses on glass core manufacturing, and LG Innotek lays out next-generation packaging materials, forming one of the most complete glass substrate industrial clusters in the world.

TSMC and Japan: Panels first, glass later

Different from South Korea's goal of taking the lead in realizing mass production of glass substrates, TSMC has chosen a more stable technical route: first complete the industrialization of Panel Level Packaging (PLP), and then decide whether to fully introduce the glass core.

At present, TSMC's most important project is the CoPoS (Chip-on-Panel-on-Substrate) platform located in Chiayi. Different from the traditional CoWoS which uses 300mm round wafers, CoPoS extends advanced packaging to 310×310mm rectangular panels for the first time. The purpose is not to replace materials, but to improve the area utilization and production efficiency of ultra-large Chiplet packaging. In February this year, the CoPoS production line completed the entry of key equipment, and completed trial production around June. According to the plan, it will enter trial mass production in 2027 and achieve official mass production in 2028.

From the perspective of technical path, CoPoS and glass substrate are not the same concept. CoPoS emphasizes "panelization", while glass emphasizes "substrate material". Theoretically, CoPoS can use either organic materials or switch to glass core in the future. Therefore, TSMC is actually reserving a manufacturing platform for glass, rather than rushing to switch the material system.

Equipment supplier SCHMID also said that whether the CoPoS platform adopts glass substrates is still in the continuous evaluation stage, and no final plan has been formed. TrendForce further predicts that the time for TSMC to truly commercialize glass substrates may be after 2030, which means that its focus in the next few years will still be on improving the yield of panel-level packaging, rather than taking the lead in betting on glass materials.

In fact, TSMC's attitude towards glass has undergone an obvious adjustment. A few years ago, due to process maturity and cost factors, the company once lowered the R&D priority of glass substrates; but as ultra-large AI packages such as NVIDIA's Blackwell and Rubin continue to break through the packaging size limit, glass research has been restarted. The industry generally believes that NVIDIA almost dominates the evolution rhythm of current AI packaging specifications, and TSMC adopts a more "customer demand-driven" strategy—only when ultra-large packages really break through the limit of organic substrates, glass will be included in the mass production roadmap.

Compared with TSMC's focus on packaging manufacturing, Japanese enterprises are almost all deployed in upstream materials and processes.

Among them, Dai Nippon Printing (DNP) has launched a 510×515mm TGV glass core material pilot production line in Saitama Prefecture, plans to deliver samples to customers in 2026, and achieve mass production in fiscal year 2028; TOPPAN is simultaneously building a glass core material and glass interposer trial production line, focusing on breaking through high-precision glass processing and multi-layer interconnection technology; Nippon Electric Glass (NEG) has launched a 515×510mm, 1mm thick ceramic-reinforced glass core to provide higher mechanical strength for large-size packages.

The more forward-looking one is Rapidus. This Japanese 2nm wafer foundry has begun to study 600×600mm glass panel-level packaging, hoping to combine glass with the next-generation Chiplet system to reserve manufacturing capabilities for ultra-large AI chips in the late 2020s. Although the project is still in the feasibility study stage, it also reflects Japan's hope to make early layout in the next-generation packaging infrastructure.

On the whole, TSMC and Japan have formed a complementary relationship: TSMC is responsible for defining the future packaging platform, and Japan is responsible for providing glass materials, TGV processing and core manufacturing processes. Compared with South Korea's pursuit of mass production first, the two are more inclined to complete the large-scale introduction of glass substrates after the industry matures.

Final Notes

At present, the public routes of major manufacturers around the world have gradually become clear: Absolics hopes to complete commercial supply first at the end of 2026; Samsung GLASEM aims at mass production in 2027; TSMC will complete the maturity of the CoPoS platform around 2028, and then decide the pace of glass introduction; Intel is more inclined to high-end server platforms around 2030.

This means that the focus of competition in the next three years is not who proposes the concept, but who can get the first real mass production customer first.

Does the market really need glass? The answer almost only points to one field: AI.

TrendForce estimates that the current processing cost of CoWoS interposer wafers is close to 10,000 US dollars per piece, which is equivalent to the cost of advanced 7nm logic wafers. When the packaging area continues to expand, the edge waste of round wafers becomes more and more serious, and organic substrates also begin to face the dual bottlenecks of warpage and dimensional stability.

The problem that glass substrates really solve is not simply to improve performance, but to provide a platform that can continue to expand the area for future **ultra-large Chiplet, HBM4/5 and Co-Packaged Optics (CPO)**. Without new substrate materials, the size and yield of AI packaging will be limited.

The first glass substrate market report jointly released by SEMI and TechSearch predicts that this technology will enter the initial mass production stage around 2028, and maintain a compound annual growth rate of 67.2% from 2028 to 2040. Yole also predicts that the