The industrialization of MRAM has reached the "critical point".
Since 2026, MRAM has ceased to be the "next-generation memory" only in PPTs. The first 8nm eMRAM tape-out in Asia, the successful test flight of a drone equipped with Zhizhen Storage's SOT-MRAM, TSMC's breakthrough in 1-nanosecond SOT-MRAM, and the completion of the world's first 8-inch magnetic random storage chip production line in Qingdao - these events converge to mark that the industrialization of MRAM has reached a "critical point".
MRAM's "2026 Moment"
In 2026, the MRAM (Magnetoresistive Random Access Memory) industry began to experience a concentrated explosion, and a new type of storage technology started to move from the laboratory to a commercial closed-loop.
Event 1: The first 8nm eMRAM AI chip tape-out in Asia. Hanxu Technology announced that its AI chip based on self-developed MRAM bit cells has completed tape-out. It adopts a "MRAM + SRAM" hybrid architecture, supports the operation of large models with 2 billion parameters on the edge side, and its energy efficiency ratio is 2 - 3 times that of traditional solutions. This is the first time in Asia that an eMRAM AI chip has been engineered and implemented on an 8nm advanced process.
Event 2: The first successful test flight of a domestic drone equipped with SOT-MRAM. The SOT-MRAM chip independently developed by Zhizhen Storage was installed on the "Tianmushan 13" drone and completed a test flight. In the flight control system, its non-volatility, radiation resistance, and wide temperature range (-40°C to 125°C) characteristics were verified. This is the first commercial application of domestic MRAM in the low-altitude economy field.
Event 3: The MRAM computing-in-memory chip in Hubei was reported by CCTV's "News Broadcast". This chip is currently the MRAM computing-in-memory chip with the largest storage capacity in the world. Its power consumption is only one-thousandth of that of computing chips of the same specification and will soon be applied to smart city scenarios such as smart cameras.
Event 4: The world's first new-generation magnetic random storage chip production line was completed in Qingdao. After testing, the writing speed of the chips produced by Qingdao Haicun Microelectronics Co., Ltd. reaches the nanosecond level, which is tens of thousands of times faster than the current mainstream flash memory. The chips support a wide operating temperature range from -40°C to 125°C and also have radiation resistance. Their main performance indicators have reached the global leading level. Supported by a provincial science and technology project, multiple units such as Qingdao Haicun Microelectronics Co., Ltd. and Beihang University jointly achieved a breakthrough. After the project reaches full production, the annual production capacity will reach 48 million chips, and the output value will exceed 2 billion yuan.
It is not difficult to see that the industrialization of MRAM is entering a new stage from "technological breakthrough" to "scenario implementation".
The "Three Kingdoms' Struggle" of Three Routes: STT, SOT, and VC-MRAM
Magnetoresistive Random Access Memory (MRAM) is a new type of information storage device based on spintronics. Its core structure consists of a magnetic tunnel junction and an access transistor. The first-generation MRAM is Toggle-MRAM, and the writing method is magnetic field writing. With the development of technology, MRAM has currently diverged into three main routes: STT-MRAM (Spin Transfer Torque), SOT-MRAM (Spin Orbit Torque), and VC-MRAM (Voltage Control). They are not simply in a generational replacement relationship but form a complementary division of labor in different application scenarios.
STT-MRAM: The "Main Force" of Current Industrialization
STT-MRAM is the second-generation MRAM technology. Its core structure is a magnetic tunnel junction (MTJ), which consists of two ferromagnetic layers and a nanoscale non-magnetic isolation layer (usually MgO). When writing, the current passes vertically through the MTJ, and the magnetization direction of the free layer is flipped using the spin transfer torque effect.
Its main advantage lies in the process maturity . TSMC has achieved mass production of 32Mb embedded STT-MRAM based on the 22nm ULL CMOS process. The read speed reaches 10ns, it supports 260°C reflow soldering and 10-year data retention at 150°C, and the cell area is only 0.046μm². The 16nm FinFET eMRAM jointly developed by NXP and TSMC and the automotive-grade products EM064LX/EM128LX of Everspin have all passed the AEC-Q100 Grade1 certification.
However, the bottlenecks of STT-MRAM are also obvious. The writing current density is as high as 10⁶ - 10⁷ A/cm², resulting in relatively high dynamic power consumption. The read and write share the same current path, which leads to read interference and durability limitations (usually 10¹⁰ - 10¹¹ write cycles). As the process is scaled down to the 1X nm node, the contradiction between thermal stability and writing efficiency becomes more and more acute.
SOT-MRAM: The "New Favorite" of Low Power Consumption and High Speed
SOT-MRAM is the third-generation technology. Its revolutionary feature is the separation of read and write paths. The current no longer passes vertically through the MTJ but is injected into a heavy metal layer (such as tungsten or platinum) in the plane. A spin current is generated through the spin Hall effect, which indirectly flips the magnetic moment of the free layer. This structural change has brought a qualitative leap.
In 2022, the SOT-MRAM jointly developed by TSMC and the Industrial Technology Research Institute achieved a writing speed of 0.4 nanoseconds and a read - write durability of 7 trillion times. Its power consumption is only one-hundredth of that of STT-MRAM. Last year, the joint team of TSMC took a further step. By using β-phase tungsten material, the switching speed was advanced to 1 nanosecond while maintaining a tunneling magnetoresistance ratio of 146%.
However, the bottleneck in the industrialization of SOT-MRAM lies in the process complexity. As a three-terminal device (2T1MTJ structure), its cell area is larger than the 1T1R architecture of STT. It requires the additional introduction of a heavy metal layer, which increases the difficulty of material selection and process control. The optimization of the inclined structure SOT element requires precise MTJ stacking design and angle control. Zhizhen Storage is currently the only domestic enterprise that has achieved mass production of SOT-MRAM. It has chosen to enter from industrial-grade/low-altitude economy scenarios, giving full play to the advantages of SOT in high reliability and low power consumption.
VC-MRAM: The "Future Route" for Ultra-Low Power Consumption
VC-MRAM (Voltage-Controlled Magnetic Anisotropy, VCMA) changes the magnetic anisotropy of the free layer through an electric field rather than a current. Theoretically, it can reduce the writing energy consumption to less than 1/10 of that of STT. Its advantages are a small cell area and extremely low static power consumption, making it very suitable for scenarios that are extremely sensitive to power consumption, such as IoT sensors and wearable devices.
However, VC-MRAM is still in the early stage. Before writing, it needs to "pre-read" the current state to determine the direction of the unipolar pulse, resulting in a relatively slow writing speed. The consistency and reliability of the device still need more verification. The MRAM market research report released by Global Market Insights (GMI) predicts that the compound annual growth rate (CAGR) of VC-MRAM will reach 34.9%, making it the fastest-growing MRAM segment. However, there is still a 3 - 5-year gap from large-scale mass production.
Currently, there is no "winner-takes-all" situation among the three routes. Instead, a clear division of scenarios has been formed. STT-MRAM focuses on automotive-grade embedded storage (replacing eFlash), MCU integration, and industrial control. It will still be the main revenue source in the short term. SOT-MRAM enters high-performance caches, computing-in-memory, and industrial-grade/low-altitude economy flight control. It exchanges speed and durability for density. VC-MRAM targets edge AI, IoT terminals, and wearable devices, with ultra-low power consumption as its selling point.
MRAM's "Killer Application"
MRAM does not need to defeat DRAM or NAND in terms of capacity. Its commercialization logic is to establish irreplaceability in the intersection area of "non-volatility + high speed + low power consumption + high reliability". In 2026, multiple scenarios are simultaneously verifying this logic.
Edge AI: The "Computing-in-Memory" Revolution of MRAM
The core contradiction currently faced by edge AI is the "memory wall" - the energy consumption of data transfer between the processor and the memory far exceeds that of the calculation itself. Samsung's paper on MRAM in-memory computing published in Nature in 2022 pioneered this direction, and Hanxu Technology's 8nm eMRAM AI chip has pushed this concept to engineering, supporting the edge-side operation of large models with 2 billion parameters.
Low-Altitude Economy: The Non-Volatility Requirement of Industrial Drones
The implementation of Zhizhen Storage's SOT-MRAM in the flight control of drones reveals a high-value scenario that has been overlooked. Low-altitude aircraft have extremely strict requirements for memory: flight attitude data must be saved instantly when power is cut off (non-volatility), data cannot be lost in a high-vibration environment (shock resistance), it must work stably in a wide temperature range from -40°C to 125°C, and data must be retained for more than 10 years. Traditional NOR Flash has a slow writing speed, SRAM is volatile and has a large area, and DRAM needs to be refreshed and has poor low-temperature performance. MRAM is almost the only storage technology that can meet all these conditions simultaneously.
As the low-altitude economy is included in the national strategy, the flight control systems, navigation modules, and black box data records of eVTOL (Electric Vertical Takeoff and Landing) aircraft, industrial drones, and logistics delivery aircraft may all become large-scale application scenarios for MRAM.
Space Computing Power: The "Radiation Resistance Requirement" of On-Orbit AI and Satellite Internet
If the automotive and low-altitude economy are the "ground trials" for MRAM, then space computing power is its "ultimate test field" - and it is also one of the most irreplaceable scenarios for MRAM at present.
The space environment causes all-round damage to memory: high-energy particle bombardment causes single-event upsets (SEU) and single-event latch-ups (SEL); the accumulation of total ionizing dose (TID) causes the threshold voltage of traditional memory to drift; extreme temperature differences (-150°C to +120°C) and the vacuum environment further amplify the risk of device failure. Traditional NOR Flash will experience "hard failures" and single-event functional interruptions (SEFI) in a radiation environment. SRAM requires battery backup and is extremely sensitive to SEL, while the refresh mechanism of DRAM can hardly maintain data integrity under radiation interference.
The physical characteristics of MRAM make it a "naturally radiation-resistant" memory. MRAM stores data based on the magnetoresistance effect and does not require a refresh operation. Data reading and writing can be completed quickly. In some application scenarios with extremely high real-time response requirements, such as high-speed data processing centers and artificial intelligence computing platforms, the high-speed read and write characteristics of MRAM can significantly improve the data processing ability of the system. More importantly, due to its magnetic storage principle, MRAM has natural immunity to the single-event upset effect caused by space radiation. At the same time, it has symmetric read and write speeds and ultra-low operating power consumption. Compared with dynamic random access memory (DRAM) of the same density, it has achieved a double breakthrough of "faster speed and lower power consumption", perfectly adapting to the energy constraints of long-distance space flight. In scenarios where spacecraft are far from the sun and solar power supply is limited, the low-power advantage of MRAM is particularly prominent. It can reduce the system energy consumption while carrying more on-orbit data processing tasks, greatly reducing the failure risk of space missions. The Earth observation satellite SpriteSat launched by Japan has upgraded the memory of its magnetometer subsystem to MRAM, verifying the space application value of this technology.
More importantly, space computing power is shifting from "ground processing" to "on-orbit processing". With the explosion of low-Earth orbit (LEO) satellite constellations, satellites need to process remote sensing images in real-time on orbit, perform AI inferences, and manage constellation communication protocols, rather than transmitting all raw data back to the ground. This places requirements for infinite write durability and nanosecond-level deterministic writing on memory: satellite on-orbit software updates, AI model iterations, and real-time data log records may generate millions of writes every day. The 10⁵ write-erase cycles of NOR Flash cannot meet these requirements at all, while the durability of MRAM of over 10¹⁴ times is almost equivalent to "infinite life".
MRAM manufacturer Avalanche Technology also announced that it has completed the first-stage goal of a strategic contract from the US government. This project focuses on the scaling process of magnetic storage cells, aiming to lay the technical foundation for the development of next-generation aerospace-grade MRAM chips.
From an industrial perspective, space computing power is becoming a "high-premium export" for MRAM. For the Chinese MRAM industry, space computing power is a strategically significant entry point. On the one hand, China is accelerating the construction of low-Earth orbit satellite Internet constellations (such as the "State Grid Constellation"), and the demand for high-reliability on-orbit storage is increasing sharply. On the other hand, the aerospace application has extremely high requirements for localization, which happens to resonate with the full-stack layout of domestic MRAM. The radiation resistance, wide temperature range, and non-volatility characteristics verified by Zhizhen Storage's SOT-MRAM in drone flight control are highly homologous to the requirements of satellite on-orbit storage - from low altitude to space, the technology migration path is clear.
Automotive and Industrial Control: The Logic of Gradual Replacement
In ADAS domain controllers, MRAM is gradually replacing NOR Flash for OTA firmware storage and configuration data preservation. Its infinite read and write durability (compared to 10⁵ write-erase cycles of Flash) and high-speed read ability can significantly shorten the system startup time.
MRAM is not a "Replacement" for Memory but a "Reconstructor" of the Computing Architecture
Looking back at the four landmark events in 2026, they all point to a deep logic: in the general trend of AI computing power migrating from the cloud to the edge, the energy efficiency ratio of memory is determining the boundary of edge AI. The value of MRAM does not lie in replacing the capacity advantages of DRAM or NAND but in redefining the physical boundary of "storage - computing" - making the storage unit itself a computing unit, making non-volatility the default option in architecture design, and making low power consumption no longer come at the cost of sacrificing speed.
From the computing-in-memory of edge AI, to the flight control black box in the low-altitude economy, and then to the on-orbit AI in space computing power, the common feature of these scenarios is that they do not require MRAM to win in terms of capacity but need it to be irreplaceable in the "reliability triangle" (non-volatility + high speed + radiation resistance) . This is the correct way to industrialize MRAM.
For the Chinese semiconductor industry, MRAM is a rare industrial opportunity. In the traditional DRAM/NAND fields, international giants have established insurmountable patent and scale barriers through decades of accumulation. In the new MRAM track, the technical routes have not yet converged, and application scenarios are defining products. The domestic industrial chain has the opportunity to make early layouts. In 2026, the industrialization of MRAM has indeed reached a "critical point" - not because it is already mature, but because it is already important enough and cannot be ignored anymore.