Who is taking on the tough challenge in the domestic EDA field?
"The toolchain has not been fully connected", "There is still a gap in core technologies", "The industrial ecosystem urgently needs to be improved" - these three tough challenges are the key barriers that domestic EDA must overcome on its path to breakthrough.
Facing this crucial battle for the security of the industrial chain, domestic EDA manufacturers are going all out: IPO bell - ringing events are frequent, and industrial mergers and acquisitions are being implemented intensively.
The EDA market is heating up
Currently, there are only three listed companies in the domestic EDA market, namely Empyrean Technology Co., Ltd., ProPlus Design Solutions Co., Ltd. and Verisilicon Microelectronics (Shanghai) Co., Ltd.. However, since 2025, many leading EDA enterprises have successively initiated the process of listing on the A - share market:
On April 10, 2025, Xinyaohui Technology Co., Ltd., an EDA IP enterprise, started IPO counseling, and the counseling institution is Guotai Junan Securities Co., Ltd.
On December 11, 2025, Quanxin Zhizao Technology Co., Ltd. filed for counseling record - keeping with the Anhui Securities Regulatory Bureau, and its counseling institution is Guotai Haitong Securities Co., Ltd.
On December 24, 2025, the IPO counseling work of Xinhe Semiconductor Technology (Shanghai) Co., Ltd. was officially completed. CITIC Securities issued a report confirming that it has the governance structure and compliance capabilities required for listing.
On December 26, 2025, the IPO counseling public - notice system on the official website of the China Securities Regulatory Commission showed that Shanghai Hejian Industrial Software Group Co., Ltd. officially submitted an IPO counseling record - keeping application to the Shanghai Securities Regulatory Bureau, and the sponsoring institution is Guotai Haitong Securities Co., Ltd.
Let's take a look at the merger and acquisition actions of domestic EDA companies in 2025.
On September 29, ProPlus Design Solutions Co., Ltd. issued an announcement, announcing that it plans to acquire 100% of the equity of Chengdu semiconductor IP design enterprise Ruicheng Xinwei and 45.64% of the equity of Chengdu semiconductor IP design enterprise Nengneng Micro through the issuance of shares and payment of cash, and raise supporting funds. Before this transaction, Ruicheng Xinwei held 54.36% of the equity of Nengneng Micro, and Nengneng Micro was a subsidiary controlled by Ruicheng Xinwei. After the transaction is completed, both Ruicheng Xinwei and Nengneng Micro will become wholly - owned subsidiaries of the listed company.
In December 2025, Empyrean Technology Co., Ltd. strategically acquired Sierxin Co., Ltd., a leading enterprise in the domestic digital EDA field. This merger and acquisition investment was jointly completed by Empyrean Technology Co., Ltd. and the Greater Bay Area Fund, marking the joint efforts of the industry leader and the strategic fund to strengthen the integration of the domestic EDA industrial chain.
Behind the capital frenzy lies the industry's anxiety and desire. To answer "Who is gnawing on the tough challenges", we first need to see who is on the battlefield.
For EDA companies, the higher the EDA integration, the greater the advantage. However, a full - set of EDA tools is extremely complex. EDA tools can be subdivided into three categories: full - flow EDA for digital chip design, full - flow EDA for analog and mixed - circuit design, and EDA for integrated circuit manufacturing. Among them, the full - flow tools for digital circuit design can be divided into front - end and back - end parts according to the design process, and there are different design tools and verification tools for the front - end and back - end; the design tools for analog and mixed - circuit design focus on circuit design, simulation verification, and physical implementation; and the EDA tools for integrated circuit manufacturing are used to develop manufacturing process platforms and wafer manufacturing.
The first tough challenge: "Breakpoints" and "Sutures" in the toolchain
The pain point of the first tough challenge: International giants provide a "turn - key" project. From front - end design to back - end layout and then to packaging and testing, the data flow is unobstructed. In contrast, domestic tools have long been presented in a "point - like distribution". Design companies use the front - end of company A, the simulation of company B, and the verification of company C. Data conversion is not only inefficient but may also result in loss of accuracy and even lead to tape - out failure.
So, who is gnawing on this first tough challenge? And how?
Empyrean Technology Co., Ltd. is one of the earliest domestic enterprises engaged in EDA research and development. Based on analog EDA, Empyrean Technology Co., Ltd. gradually expands into fields such as digital and advanced packaging, and is committed to building a full - flow toolchain.
In the field of analog circuit design, Empyrean Technology Co., Ltd. provides a complete toolchain from schematic editing, layout design to circuit simulation and physical verification. This system includes core products such as Empyrean Aether (schematic editing tool) and Empyrean ALPS (circuit simulation tool).
In the field of radio - frequency circuit design, Empyrean Technology Co., Ltd. has also achieved full - flow coverage. Its system integrates tools such as radio - frequency model extraction, schematic editing, and electromagnetic field simulation, filling the domestic gap in this field.
In the aspect of digital circuit design, although Empyrean Technology Co., Ltd. has not yet achieved full - flow coverage, it is rapidly filling in the key links through independent research and development and strategic mergers and acquisitions. In recent years, Empyrean Technology Co., Ltd. has accelerated the filling of the digital EDA short - board by acquiring Xinda Technology, Akasi Micro, and investing in Sierxin.
In the aspect of flat - panel display circuit design, its full - flow EDA tool system is in a leading position globally, including a full set of tools such as optoelectronic device modeling, optical simulation, circuit design, layout design, physical verification, and circuit simulation.
The second tough challenge: "Generational gap" and "Catching up" in core technologies
The pain point of the second tough challenge: For mature processes above 28nm, domestic tools are basically "usable". However, in advanced processes such as 7nm, 5nm, and even 3nm, international giants have accumulated decades of algorithm models, physical effect libraries, and process data, forming extremely high technical barriers. Domestic tools often have generational gaps in terms of accuracy, speed, and convergence.
So, who is gnawing on this second tough challenge? And how?
ProPlus Design Solutions Co., Ltd. takes the "bottom - up penetration" route. It does not directly develop full - flow tools but focuses on device modeling and circuit simulation. These two links are the bridges connecting design and manufacturing and require extremely high algorithm accuracy. ProPlus Design Solutions Co., Ltd.'s wafer - foundry customers cover nine of the top ten global wafer - foundry manufacturers, including TSMC, Samsung Electronics, UMC, GlobalFoundries, SMIC, etc. The company's device modeling and verification EDA tools have achieved a relatively high market position and have been adopted and verified by most leading global wafer - foundries. Memory customers include Samsung Electronics, SK Hynix, Micron Technology and other top three global memory manufacturers, which are long - term customers of ProPlus Design Solutions Co., Ltd. The circuit simulation and verification EDA tools have entered leading global integrated circuit enterprises. This "accompanying" model allows it to obtain the most advanced process data in a timely manner and feed it back to algorithm iteration. It uses the "depth at the manufacturing end" to make up for the "lack of breadth at the design end" and narrow the generational gap in core algorithms.
Hejian Industrial Software chooses the "side - way breakthrough" strategy. Since the full - flow cannot be fully connected immediately, it focuses on optimizing the biggest bottleneck - "verification". Hejian Industrial Software is a leading domestic digital EDA enterprise and a representative of full - flow/platform - type EDA. It focuses on the synergy between digital chip EDA and high - end IP and is the only domestic platform - type EDA enterprise covering digital verification, DFT, IP, etc. It is also one of the few domestic leading enterprises with full - flow EDA capabilities and high - end IP independent R & D capabilities. Hejian Industrial Software's high - speed interface IP solution supports multiple advanced processes, has been tape - out verified, and has been successfully deployed in the chips of leading domestic IC enterprises.
Its UniVista series of hardware verification accelerators is the first domestically - developed hardware emulator that can be expanded to a 46 - billion - gate design and supports further expansion of multiple systems, which can significantly improve the simulation verification efficiency and shorten the simulation verification cycle of ultra - large - scale chips.
Xingxin Technology chooses to make a breakthrough in the most difficult "sign - off" link. Sign - off is the last checkpoint before chip tape - out. Once an error occurs, the loss can reach tens of millions of dollars. For a long time, this has been a forbidden area monopolized by tools such as Synopsys PrimeTime. Xingxin Technology has significantly improved the efficiency and accuracy of timing analysis by introducing a new parallel computing architecture and machine - learning algorithms and has passed the verification in advanced - process projects of several leading domestic chip companies. It has proved that domestic EDA can not only "imitate" but also "innovate" in core algorithms.
Xinhe Semiconductor is tackling the emerging "advanced packaging" chain. Xinhe Semiconductor focuses on radio - frequency/high - speed simulation and advanced packaging (Chiplet) analysis, filling the domestic gap in system - level and package - level EDA. With the rapid development of 5G, millimeter - wave communication, and Chiplet technology, the demand for radio - frequency circuit design and advanced packaging simulation continues to grow. Xinhe Semiconductor's radio - frequency simulation tools, package parasitic parameter extraction tools, and other products can effectively solve the signal integrity and power integrity problems caused by high - frequency and high - density packaging. Its products have entered the supply chains of enterprises such as Huawei, ZTE, and Changjiang Electronics Technology. Relying on its advantages in electromagnetic simulation and signal integrity analysis, Xinhe Semiconductor is redefining the design process of advanced packaging. It is not patching up the old chain but building a new chain suitable for 3D stacking.
Verisilicon Microelectronics (Shanghai) Co., Ltd. has taken a unique "hardware - software combination" path to break the situation. Different from pure software manufacturers, Verisilicon Microelectronics (Shanghai) Co., Ltd. has keenly captured the most painful pain point of wafer - foundries - yield improvement. It is not only an EDA software company but also a hardware manufacturer capable of independently developing high - precision WAT (Wafer Acceptance Test) equipment and CP (Chip Probe Test) equipment. In the domestic EDA landscape, Verisilicon Microelectronics (Shanghai) Co., Ltd. is the only enterprise that can form a complete closed - loop through "equipment data collection + software data analysis". Its strategy is "using hardware to drive software": first, it uses high - barrier and high - demand test equipment to enter the core production lines of wafer - foundries and becomes an indispensable part of the production process.
AI for EDA is a common weapon for all players. Facing the bottleneck of traditional algorithms, Empyrean Technology Co., Ltd., ProPlus Design Solutions Co., Ltd., and emerging unlisted enterprises are all vigorously deploying artificial intelligence. For example, Empyrean Technology Co., Ltd. has successfully applied AI technology in multiple point tools, such as simulators and CUDA library tools, significantly improving design efficiency and accuracy. Hejian Industrial Software has officially released the second - generation digital design AI intelligent platform - the intelligent agent UniVista Design Agent (UDA) 2.0.
Industry insiders told "Semiconductor Industry Insights" that the application of AI in the EDA field is scenario - based, such as simulation intelligent agents and back - end routing intelligent agents. A single model cannot solve all problems. Multiple models need to be iterated and scheduled in real - time. Therefore, a "general manager" - style scheduling system needs to be built to connect the models. In terms of technical logic, a data intelligent agent base needs to be built to connect the originally independent "chimney - style" models and achieve interactive iteration of multi - modal and multi - model, such as coupling analysis of electrical and thermal models, which is completely different from the traditional step - by - step analysis mode. In the future, the EDA industry may no longer simply sell single - point tools but turn to selling integrated models, and the business model will change significantly. From the perspective of technological breakthrough differences, AI will achieve faster breakthroughs in the field of digital circuit design because digital circuit design is mostly described by code and is easier to combine with AI; there are also progress in the field of physical simulation, such as the ability to generate current distribution, electromagnetic field distribution and other data in seconds.
The third tough challenge: "Islands" and "Networking" in the industrial ecosystem
The pain point of the third tough challenge: Technology can be bought, and talents can be recruited, but the ecosystem is the most difficult to replicate. International giants have built an indestructible moat by binding with university education, defining industry standards, and jointly developing PDK (Process Design Kit) with wafer - foundries. Domestic tools often face the embarrassing situation of "no one uses them, no one dares to use them, and no one knows how to use them".
So, who is gnawing on this third tough challenge? And how?
The "national team" is building a network. Relying on the background of China Electronics Corporation, Empyrean Technology Co., Ltd. is promoting the establishment of a domestic EDA application demonstration project. By deeply binding with domestic wafer - foundries such as SMIC and Huahong Group, it mandates or encourages the full - line introduction of domestic tools in specific production lines and specific projects. This "administrative + market" dual - wheel drive provides valuable trial - and - error scenarios and iteration opportunities for domestic tools.
Listed companies are building a platform. ProPlus Design Solutions Co., Ltd., Verisilicon Microelectronics (Shanghai) Co., Ltd., etc. are not fighting alone. They actively open API interfaces, support small tool developers in the upstream and downstream, and even donate software to universities for free and set up joint laboratories. Verisilicon Microelectronics (Shanghai) Co., Ltd. extends its reach to the physical production lines of wafer - foundries through the sales of test equipment, helping customers establish a closed - loop for yield improvement, so that its tools can be integrated into the customers' production lines.
New forces are breaking through the circle. Enterprises such as Hejian Industrial Software and Xinhe Semiconductor actively participate in open - source communities and industry standard - setting. They realize that only by breaking the barriers of private formats can they attract developers. Some enterprises have begun to try to launch cloud - native EDA platforms to lower the usage threshold, allowing small and medium - sized design companies to try domestic tools at low cost.
In addition, the construction of the talent ecosystem is also accelerating. In 2025, universities such as Tsinghua University and Peking University have successively added special EDA courses, and domestic tool cases are introduced on a large scale in the textbooks for the first time. These students who are about to graduate will become the most solid foundation for the future domestic ecosystem.
Industry insiders told "Semiconductor Industry Insights" that in terms of talent and technology advantages, China has a solid talent foundation in the field of underlying algorithms such as physical equation solving and grid computing, and ethnic Chinese account for a high proportion in relevant algorithm fields, which provides conditions for in - depth technological development; overseas is more inclined to Wall Street - style AI algorithms and invests relatively less in underlying physical solving. In terms of customer ecosystem advantages, domestic companies have no time difference with domestic customers and can respond to demands quickly. The actual data of customers can help products iterate and optimize quickly; the open - source ecosystem of leading customers such as Huawei can drive the coordinated development of the upstream and downstream of the industrial chain, which is more conducive to expanding the customer base compared with NVIDIA's closed - loop ecosystem. In terms of policies, the state attaches great importance to the development of industrial software and provides strong policy support. In terms of response speed, against the background of restrictions on lithography machines, customers need system - level solutions to solve practical problems. Compared with foreign giants, domestic companies may respond to demands and deliver products faster.
So, which enterprises will obviously benefit in the process of EDA localization?
Who benefits from the localization of EDA tools?
The first category is design enterprises focusing on AI / high - performance computing chips. Because the logical architecture of such chips is complex and the verification process is cumbersome, domestic EDA tools can customize functions according to the design processes and process nodes of domestic