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1.4nm, early launch, TSMC is going all out.

半导体行业观察2025-08-28 14:48
TSMC's 1.4nm fab starts construction ahead of schedule, with trial production in 2027 and investment exceeding one trillion.

According to Taiwan media reports, TSMC has started the construction of its 1.4nm advanced process plant in the Central Taiwan Science Park ahead of schedule. The Central Taiwan Science Park Administration said yesterday (the 27th) that the water conservation-related public works for the expansion of the second-phase park will be completed by the end of September. Supply chain sources revealed that TSMC's new plant in the Central Taiwan Science Park is expected to start construction in October, with an estimated total investment of NT$1.2 trillion (about RMB 233.8 billion) to NT$1.5 trillion (about RMB 350.8 billion).

Currently, it is known that relevant manufacturers, including those in construction, cement, and factory engineering, have successively received notices that the construction project of TSMC's advanced process plant in the Central Taiwan Science Park will be tendered soon, followed by the awarding of contracts and the start of construction. The relevant operations are in full swing.

Previously, when TSMC released its production site plan at a technology forum, the main production site for the 1.4nm process was the F25 plant in Taichung, which was originally the Xingnong Stadium. It is planned to build four factories. The first factory is expected to complete risk trial production by the end of 2027 and start mass production in the second half of 2028. The estimated turnover of the new factory is expected to exceed NT$500 billion (about RMB 116.9 billion).

The supply chain further pointed out that the two factories in the first phase of the Central Taiwan plant, which will start mass production in 2028, will likely adopt the 1.4nm process. For the two factories in the second phase, there is a possibility of advancing to the A10 (1nm) process. On the other hand, TSMC has made significant breakthroughs in the advancement of the 1.4nm process and has already notified suppliers to prepare the necessary equipment for the 1.4nm process. It is planned to install a trial production line at the second plant in Baoshan, Hsinchu, this year.

It is understood that in TSMC's Fab 20 in Baoshan, which was originally planned to use the 2nm process, two of the factories will be converted to the 1.4nm process and R & D lines, the third factory will be for the 1nm process and R & D lines, and the fourth factory may be for the 0.7nm process and R & D lines. In the Central Taiwan Science Park, the initial plan is to build four factories. The two factories in the first phase will use the 1.4nm process, and the two factories in the second phase may use the 1nm process. In addition, TSMC has planned to invest in building a 1nm advanced process base in the Nanshalun Park. Judging from the current land area of 500 hectares, it is estimated that 10 wafer fabs can be built.

It can be seen that this leading wafer foundry is far ahead in advanced processes.

Leading the Way with 1.4nm

At the North American Technology Symposium held in April this year, TSMC first introduced its next-generation advanced logic process technology, A14.

It is reported that TSMC's A14 process is based on its second-generation nanosheet gate-all-around transistor and a new standard cell architecture. Compared with the N2 process, which will start mass production later this year, A14 will achieve a speed increase of up to 15% at the same power consumption or a power reduction of up to 30% at the same speed, while the logic density will increase by more than 20%. TSMC said that with its experience in the co-optimization of nanosheet transistor design and technology, the company is upgrading its TSMC NanoFlex standard cell architecture to NanoFlex Pro to achieve higher performance, energy efficiency, and design flexibility.

Kevin Zhang, Senior Vice President of Business Development and Global Sales and Deputy Chief Operating Officer of TSMC, said, "A14 is our next-generation advanced silicon technology for the full node." "In terms of speed, compared with N2, it has a 15% speed increase, a 30% power reduction, and the logic density is 1.23 times the overall chip density, or at least 1.2 times that of a mixed design. So, this is a very, very important technology."

From relevant reports, unlike A16 (as well as N2 and N2P), A14 lacks the Super Power Rail (SPR) Backside Power Delivery Network (BSPDN), which allows this technology to target applications that cannot gain practical advantages from BSPDN - but this requires additional costs. Many client, edge, and professional applications can take advantage of the additional performance, lower power consumption, and transistor density brought by TSMC's second-generation GAA nanosheet transistors, but these applications do not require dense power wiring, and the traditional front-side power delivery network can meet the requirements. Of course, TSMC also understands the needs of customers for developing high-performance client and data center applications and will offer a version of A14 with backside power delivery in 2029. TSMC has not publicly determined the name, but according to TSMC's traditional naming rules, it is reasonably expected to be called A14P. Looking to the future, after 2029, A14 will introduce a maximum-performance version (A14X) and a cost-optimized version (A14C).

As mentioned above, NanoFlex Pro is a key feature of A14. This architecture enables chip designers to fine-tune the transistor configuration to achieve the best power, performance, and area (PPA) for specific applications or workloads. The non-Pro version, FinFlex, allows developers to mix and match different (high-performance, low-power, area-efficient) cells within a block to optimize performance, power consumption, and area.

However, TSMC has not publicly disclosed the differences between NanoFlex and NanoFlex Pro. It is unclear whether the new version allows for more precise control of cells or even transistors, or has better algorithms and software enhancements to achieve the goal of faster development and optimization of transistors. Kevin Zhang said that this is actually a Design-Technology Co-Optimization (DTCO) technology that allows designers to design products in a very flexible way to achieve the best power-performance advantages.

According to the original plan, TSMC planned to start producing chips based on the A14 process technology in 2028, but did not disclose whether mass production would start in the first half or the second half of the year. Considering that A16 and N2P will start large-scale production in the second half of 2026 (i.e., the end of 2026) and the chips will be on the market in 2026, we speculate that the target production time for A14 is the first half of 2028 - which is expected to meet the needs of customer applications launched in the second half of the year.

Now, with TSMC starting ahead of schedule, the progress of everything may also be advanced.

Almost No Competitors After 2nm

The reason why TSMC has advanced the R & D of advanced processes is closely related to its excellent performance in the 2nm process. A previous report pointed out that TSMC has started accepting orders for its next-generation technology since April 1st, with the main goal of reaching a monthly production of 50,000 wafers by the end of the year.

According to a report by Digitimes citing supply chain sources, the semiconductor supply chain said that TSMC's 2nm process has started mass production as scheduled in the fourth quarter of 2025, and the foundry price has soared to a sky-high price of US$30,000. Leading chip manufacturers are still competing to place orders to grab production capacity. By the end of the year, Apple, AMD, Qualcomm, MediaTek, Broadcom, and Intel have started mass production or cooperation.

Looking ahead to 2026, the production volume of the above six major customers will soar. In 2027, in addition to NVIDIA, more than 10 major manufacturers, including Annapurna under Amazon and Google, will enter mass production.

Therefore, TSMC has also increased the monthly production capacity plans for its Fab 20 in Baoshan and Fab 22 in Kaohsiung. Coupled with the full capacity utilization of the 4/3nm process until the end of 2026, it will help TSMC withstand external challenges such as tariffs, exchange rate fluctuations, and high costs. It is expected that TSMC's profits will exceed expectations in 2025 and 2026.

The supply chain industry said that although the market once thought that TSMC's competitors, such as Samsung Electronics and Japan's Rapidus, had the strength to grab orders, TSMC was not affected at all and continued to advance its process as planned. The globally watched 2nm process will start mass production in the fourth quarter. According to TSMC's plan, Fab 20 in Baoshan, Hsinchu, and Fab 22 in Kaohsiung are important bases for the 2nm process. Both started construction in 2022 and will be put into production successively in 2025.

By the end of 2025, the total monthly production capacity of the 2nm process in Baoshan and Kaohsiung will be approximately 45,000 - 50,000 wafers. In 2026, the monthly production capacity will exceed 100,000 wafers. Adding the P2 plant of Fab 21 in Arizona, USA, which started mass production earlier, the production capacity will reach approximately 200,000 wafers in 2028. The additional production capacity in the future will also include the P3 plant in the US, which will mainly focus on the 2nm process.

Digitimes pointed out that in 2027, in addition to NVIDIA, the leading AI GPU manufacturer, more than 10 major manufacturers, including Annapurna under Amazon, Google, and Marvell, will enter mass production. Apple will still be the main major customer, and Qualcomm, AMD, and Intel will also continue to increase their order volumes. It is reported that Apple is the largest customer for these wafers from the manufacturer and has obtained nearly half of the initial production capacity. Most of the shipments may be used for the A20 and A20 Pro chipsets in the iPhone 18 series.

As TSMC's competitor, although Intel's 18A node still lags behind TSMC's 2nm process yield, it has surpassed its competitor Samsung and is expected to start mass production by the end of this year. According to an analysis by Keybanc Capital Markets, the current yield of Intel's 18A process has reached 55%, an increase from 50% in the previous quarter. In contrast, the yield of Samsung's SF2 process is about 40%. TSMC's 2nm yield is 65%.

Samsung also mentioned in its financial report that the 2nm semiconductor foundry process will start mass production in the second half of the year. Among them, Samsung's 2nm chips are only used in its own mobile phones, while TSMC's 2nm process customers include major manufacturers such as Apple, MediaTek, Qualcomm, and AMD. The application fields include smartphone chips and computer central processing units (CPUs).

In addition, Japan's Rapidus recently announced the successful trial production of the 2nm process. However, there is still a large gap between Rapidus' production capacity scale and business model and those of the three major semiconductor manufacturers, TSMC, Samsung, and Intel.

In other words, the outcome of the 2nm competition may already be clear. The industry believes that TSMC's production is tailored to the diverse needs of customers. Since TSMC has more than 500 customers and produces more than 10,000 types of products, it can support the R & D and mass production of the 2nm process under the economy of scale. TSMC leads other competitors far behind in terms of 2nm yield, customer structure, mass production scale, and market share. TSMC will continue to maintain its leading position in advanced processes.

In this situation, TSMC can be said to be far ahead.

Conclusion

TSMC said on its official website that in order to maintain its technological leadership, the company plans to continue to invest heavily in R & D. While continuously advancing the R & D pipelines of the A16 and A14 advanced CMOS logic nodes, the company's exploratory R & D work will focus on nodes after A14, as well as fields such as 3D transistors, new memories, and low on-resistance (R) interconnects. This work aims to lay a solid foundation for the development of future innovative technology platforms.

Meanwhile, TSMC's 3DFabric advanced packaging R & D center is developing innovations in subsystem integration to further enhance advanced CMOS logic applications.

TSMC emphasized that the company continues to focus on new professional technologies such as radio frequency (RF) and 3D intelligent sensors for 5G and smart IoT applications. TSMC's research continues to develop new materials, new processes, new equipment, and new memories that may be adopted in the next decade or even further into the future. The company will also continue to cooperate with external research institutions from academia and industrial alliances to identify and adopt future cost-effective technologies and manufacturing solutions early.

With a high-quality and dedicated R & D team and an unwavering commitment to innovation, TSMC is confident that it can drive future business growth and profitability in the next few years by providing customers with advanced and competitive semiconductor technologies.

This leaves the author with a question: Can any other manufacturer catch up with TSMC?

This article is from the WeChat official account “Semiconductor Industry Observation” (ID: icbank). Author: Editorial Department. Republished by 36Kr with permission.