Decisive battle in hybrid bonding
In the storage field, the bonding method has always been a core issue of concern for several manufacturers. With the development of advanced packaging technologies, especially as 3D NAND and High-Bandwidth Memory (HBM) continue to move towards higher stacking layers and closer interconnections, unprecedented challenges have been posed to the precision, density, and yield of bonding technologies. Against this backdrop, "Hybrid Bonding" is rapidly transitioning from a laboratory technology to large-scale mass production, becoming a new pillar in storage chip manufacturing.
Traditional thermocompression bonding or micro-bump interconnection solutions, although they have met the process requirements of the past decade to a certain extent, are gradually facing bottlenecks in terms of nano-pitch, signal integrity, power consumption control, and interconnection density. Especially in the HBM field, with the advancement of HBM3E and even HBM4, there is an urgent need for high-speed, low-power vertical interconnections for hundreds to thousands of TSV channels, and this is where hybrid bonding can exert its greatest advantages.
Hybrid bonding achieves simultaneous bonding of metal-to-metal and oxide-to-oxide through atomically flat contact surfaces, eliminating the size limitations and parasitic effects brought about by traditional bump structures, resulting in shorter signal transmission paths, lower power consumption, and higher speeds. In 3D NAND, hybrid bonding is expected to replace some structures such as "Through-Silicon Via through Oxide Layer" (TCAT) or "CMOS-under-array," opening up new paths for the stable manufacturing of higher stacking layers (such as over 300 layers).
Industry-leading manufacturers such as Micron, SK hynix, and Samsung have already deployed hybrid bonding technology in HBM4 and the next-generation CUBE architecture. It can be foreseen that hybrid bonding is not only a process innovation but also the key to future storage and high-performance computing interconnection methods, and its strategic position is becoming increasingly prominent.
Aggressive Samsung
Samsung is undoubtedly one of the storage manufacturers most enthusiastic about hybrid bonding.
As early as last June, The Elec reported that although Samsung had been using thermocompression bonding before its 12-layer stacked HBM, it confirmed that hybrid bonding was necessary for manufacturing 16-layer stacked HBM.
It is reported that Samsung had been using thermocompression bonding technology before its 12-layer stacked HBM. However, now Samsung is paying more attention to the ability of hybrid bonding technology to reduce height, which is crucial for 16-layer stacked HBM. By further reducing the spacing between chips, Samsung can install 17 chips (one base chip and 16 core chips) within a size of 775 microns.
The report said that regarding its future HBM roadmap, Samsung plans to produce samples of its HBM4 in 2025, which will mainly be 16-layer stacked, and mass production is planned for 2026. In April 2024, Samsung also used the hybrid bonding equipment of its subsidiary Semes to produce a 16-layer stacked HBM sample and said that the sample was operating normally.
In July this year, Samsung announced that it would start applying Hybrid Bonding technology as early as the 16-layer stacked HBM4E (seventh-generation high-bandwidth memory). Currently, this technology is in the sample testing stage, and its commercial prospects and investment costs are considered key factors for mass production.
Kim Dae-woo, an executive of Samsung Electronics, introduced the packaging technology roadmap for next-generation semiconductors at the "2025 Commercial Semiconductor Development Technology Seminar" held on July 22. According to the technology roadmap announced on that day, Samsung plans to introduce hybrid bonding technology as early as HBM4E (seventh generation). To this end, Samsung is providing customers with 16-layer HBM samples based on hybrid bonding for evaluation and testing.
Kim Dae-woo said, "Even for 16-layer stacked HBM, it is very difficult to control the heat generation problem, so we are gradually trying to use hybrid bonding technology starting from this level." He added, "Whether HBM4E can truly achieve the commercialization of hybrid bonding still needs to comprehensively consider market acceptance and investment costs."
In addition, Samsung is also preparing for the Custom HBM business, whose future demand is expected to grow. Currently, several global large technology companies, including Google, NVIDIA, and AMD, are seeking customized HBM products suitable for their AI chips.
Kim Dae-woo revealed, "We have received a large number of inquiries about customized HBM, and we are currently preparing to develop Samsung's characteristic customized HBM, which integrates computing functions into the base die."
In addition to HBM, Samsung also signed a patent licensing agreement with domestic Changjiang Storage in February this year, obtaining the license for Changjiang Storage's hybrid bonding technology for Samsung's next-generation NAND products.
According to ZDNet, this licensing agreement covers hybrid bonding patents for 3D NAND, specifically targeting Samsung's 10th-generation V10 NAND products planned for mass production in the second half of 2025. This cooperation is of great significance because Changjiang Storage is the first company to apply hybrid bonding to 3D NAND technology and has established a strong patent portfolio in this field.
The V10 NAND is expected to have a stacking layer of approximately 420 to 430 layers and will introduce a number of innovative features. One of the most anticipated improvements is the Wafer-to-Wafer (W2W) hybrid bonding technology. This method bonds entire wafers rather than individual chips, which is expected to improve performance, heat dissipation, and productivity - this will become a key advantage as the NAND stacking layer exceeds 400 layers.
Previously, Samsung used the Chip-on-Package (COP) process, but as the NAND stacking becomes increasingly complex, the pressure on the peripheral circuits has become increasingly prominent. To solve this problem, Samsung chose to adopt the hybrid bonding process in the V10 NAND to ensure higher efficiency and reliability in multi-layer packaging.
Samsung's decision to sign a licensing agreement with Changjiang Storage is regarded as a strategy aimed at reducing future risks and accelerating its technology development. It is not yet clear whether Samsung has also conducted patent negotiations with overseas companies such as Xperi or other companies holding competing hybrid bonding patents. Industry insiders speculate that Samsung's participation in the development of next-generation NAND (including V10, V11, and V12) will inevitably involve cooperation with Changjiang Storage's patent portfolio, so these licensing agreements are crucial for the company's plans.
In Samsung's view, whether it is DRAM or NAND, hybrid bonding technology will inevitably be used in the future.
SK hynix, Not to Be Outdone
Compared with Samsung, SK hynix, which is currently more advanced in HBM, has also shown a very positive attitude towards hybrid bonding.
In June last year, SK hynix revealed that it plans to start mass-producing 16-layer HBM4 memory in 2026 and use hybrid bonding technology to stack more DRAM layers.
Kim Kyu-seok, the head of SK hynix's Advanced HBM Technology Team, pointed out that they are currently researching hybrid bonding and MR-MUF technologies for HBM4, but the yield is not yet high. If customers require products with more than 20 layers, due to thickness limitations, new processes may be required. He optimistically said that hybrid bonding technology is expected to achieve stacking of more than 20 layers with a thickness of no more than 775 microns.
In April this year, Lee Kang-seok, the vice president and head of the Packaging Development Department of SK hynix, once again emphasized that the company plans to introduce hybrid bonding technology starting from the HBM4E generation, and this generation of products will use 20-layer stacked DRAM chips.
He said that in the previous sixth-generation HBM (i.e., HBM4, with a maximum of 16-layer stacking), SK hynix used the MR-MUF technology, which connects DRAM layers through micro-bumps and fills the gaps with liquid materials.
But starting from 20-layer stacking, Lee Kang-seok said that hybrid bonding will become "indispensable." Hybrid bonding connects semiconductor layers through direct copper-to-copper contact, eliminating the dependence on micro-bumps, thereby enabling a thinner chip design. It is expected that this new bonding method will bring greater advantages in terms of performance and energy efficiency.
In addition to HBM, SK hynix is also preparing to adopt hybrid bonding in NAND. According to previous reports from Korean media, SK hynix is developing 400-layer NAND flash memory, with the goal of achieving mass production by the end of 2025.
The report quoted people familiar with the matter as saying that SK hynix is currently collaborating with supply chain partners to develop the process technologies and equipment required for 400-layer and above NAND. Since the company plans to apply hybrid bonding technology to achieve this breakthrough, it is expected that many packaging material and component suppliers will enter the new supply chain.
The report pointed out that SK hynix is researching new materials for bonding and various technologies for connecting different wafers, including polishing, etching, deposition, and wiring. The company's goal is to complete the preparation of technologies and infrastructure by the end of next year and expects to start full-scale production of 400-layer NAND in the first half of 2026.
Silent Micron
Compared with SK hynix and Samsung, Micron doesn't seem to have expressed many opinions on hybrid bonding. Although as early as February 2022, Micron signed a new multi-year agreement with Xperi and obtained the hybrid bonding IP of its subsidiary Adeia to enhance next-generation memory devices, as of now, Micron has not announced the specific mass production time of hybrid bonding in HBM and NAND.
However, it is worth mentioning that Micron's mass production speed of HBM4 seems to be faster compared to the other two. In June this year, it announced that it had started delivering samples of its next-generation HBM4 memory to major customers. This new memory component for next-generation AI and HPC processors has a capacity of 36 GB and a bandwidth of up to 2 TB/s.
The first batch of Micron HBM4 samples are 12-layer stacked products, equipped with 36 GB of memory, and have a 2048-bit wide interface and a data transfer rate of approximately 7.85 GT/s. These samples are based on 24GB DRAM devices manufactured using the company's 1β (1-beta) DRAM process technology and logic substrates produced by TSMC using its 12FFC+ (2nm class) or N5 (5nm class) logic process technologies.
Micron's current generation of HBM3E memory also offers a capacity of up to 36 GB, but it uses a 1024-bit interface with a data transfer rate of up to 9.2 GT/s, thereby providing a peak bandwidth of up to 1.2 TB/s. Even so, Micron's new HBM4 memory can increase the bandwidth by more than 60% and improve energy efficiency by up to 20%. In addition, Micron's HBM4 memory also has a built-in memory test function, which facilitates partners to simplify the integration process.
Micron is the first DRAM manufacturer in the industry to officially start providing HBM4 memory module samples to partners, but it is expected that other manufacturers such as Samsung and SK hynix will also follow suit soon. Micron and other memory manufacturers plan to start mass-producing HBM4 around 2026, and at that time, leading AI processor developers will also start mass-producing their next-generation processors.
For Micron, it may still be focusing on optimizing existing technologies and may become one of the last storage manufacturers to adopt hybrid bonding technology.
Competing Equipment Manufacturers
In fact, the ones most concerned about hybrid bonding technology are not the above three storage manufacturers, but those eager equipment manufacturers.
Currently, the leading companies in the semiconductor hybrid bonding machine equipment field include BE Semiconductor Industries NV (Besi) from the Netherlands and Applied Materials from the United States.
Among them, BESI is an important player in the global packaging equipment field and was one of the first to recognize the potential of hybrid bonding in high-end packaging, HBM stacking, and 3D NAND. Since 2019, BESI has been collaborating with institutions such as Imec and TSMC to develop hybrid bonding equipment and is one of the earliest manufacturers to deploy this technology.
It is understood that BESI's hybrid bonding system emphasizes high-precision alignment, wafer flatness control, and bonding interface quality, and is particularly suitable for 300mm wafer-to-wafer stacking. Its core technologies include sub-micron alignment and low-temperature bonding process control.
Currently, BESI's equipment has been introduced and verified by several leading packaging and testing factories, including TSMC, ASE, and many HBM supply chain customers. In 2023, its equipment was successfully used in trial production projects related to HBM4 and HBM4E and was rated as a "candidate mass production solution" in the fields of high-end graphics and AI packaging.
On the 24th of this month, BESI announced its second-quarter results for 2025 and predicted that due to the strong demand for advanced packaging equipment such as hybrid bonding, its performance in the second half of this year will improve. It said, "As customers implement their technology roadmaps for new products from 2026 to 2027, we expect the orders for hybrid bonding systems for advanced logic and HBM4 applications to increase significantly year-on-year and compared to the first half of the year."
The equipment giant Applied Materials started the layout of the hybrid bonding process platform around 2020, regarding it as one of the key technology routes to continue Moore's Law. The company named its hybrid bonding platform "Hybrid Bonding Integrated Solution," which highly integrates the equipment with the wafer process data platform.
Applied Materials emphasizes system-level integration and proposes a complete set of solutions including surface pre-treatment, alignment, bonding, and inspection. Its accumulation in material engineering, plasma processing, and wafer cleaning provides strong support for improving the yield of the hybrid bonding process.
Currently, its platform has been used by several wafer foundries (such as TSMC) and packaging giants (such as ASE) for 3D IC, HBM stacking, and logic + storage integration. Especially in the application of HBM and advanced logic chip co-packaging (CPO), Applied Materials' platform occupies a core equipment position. The company emphasizes that its hybrid bonding solution is highly compatible with other advanced packaging platforms (such as CoWoS, SoIC) and has key node value in future architectures such as AI chip CPO and Chiplet integration.
It is worth noting that in April this year, Applied Materials acquired a 9% stake in BESI. This transaction made it the largest shareholder of BESI, surpassing BlackRock Institutional Trust. In the future, Applied Materials from the United States and BESI from the Netherlands may have more cooperation in hybrid bonding.
ASMPT, headquartered in Singapore and owned by ASMI from the Netherlands, is an important participant in the packaging equipment market. Its layout of hybrid bonding started around 2021. Its hybrid bonding equipment focuses on two types of structures: wafer-to-wafer (W2W) and die-to-wafer (D2W), emphasizing sub-micron alignment accuracy, thermal-pressure collaborative process control, and equipment stability.
ASMPT has a wide customer base in Asia and other regions, especially in the packaging of storage chips and advanced logic chips (including CIS and HBM), where it occupies an important share. Its hybrid bonding equipment has entered the verification process of some packaging and testing manufacturers.
ASMPT previously announced that it received the first batch of HBM hybrid bonding machine orders last year and is expected to deliver them in the middle of this year. In its second-quarter earnings report on the 23rd of this month, ASMPT said, "Our second-generation hybrid bonding machine is competitive in terms of precision, footprint, and throughput per hour," and "We plan to ship this second-generation equipment to HBM customers in the third quarter of this year."
Facing the aggressive competition from European and American manufacturers, Korean semiconductor equipment manufacturers have been particularly active in hybrid bonding equipment in the past two years, benefiting from their geographical advantages.
First, there is Hanmi Semiconductor, an established Korean semiconductor equipment manufacturer. In 2022, it officially announced its entry into the hybrid bonding equipment market, aiming to provide domestic alternative solutions for Korean customers. It said that its hybrid bonding equipment is suitable for application scenarios such as HBM and 3D DRAM stacking.
It is understood that Hanmi emphasizes its accumulation in precision alignment and multi-axis control, which can achieve micron-level or even sub-micron-level alignment accuracy. In 2023, the company completed the development of its first equipment prototype and claimed that it could support the alignment accuracy required for 20-layer DRAM stacking.
Currently, SK hynix has been confirmed as its main cooperation customer. Korean media reported that in 2024, Hanmi's equipment entered SK hynix's verification line and is expected to be introduced as auxiliary production capacity in the HBM4E project. Hanmi is also seeking to enter Samsung's packaging and testing supply chain.
Hanwha Semiconductor, a rising star that has performed well in thermocompression bonding equipment in the past two years, has also started to participate in the competition in the hybrid bonding equipment market. It was originally a military and defense technology company. In 2023, it announced the establishment of a semiconductor equipment division, focusing on entering the advanced packaging equipment market, and hybrid bonding was listed as one of the "priority breakthrough" strategic fields.
It is understood that Hanwha promotes its development through a combination of mergers and acquisitions and self - research. It has acquired some key processes