DRAM, a change is brewing.
As Micron publicly announced the discontinuation of DDR 4 production, changes are taking place in the DRAM market. The most obvious manifestation is the rapid price increase of DDR 4. According to a recent report by Taiwan media, the spot prices of the latest DDR4 DRAM, including specifications such as 8Gb and 16Gb, skyrocketed by nearly 8% in a single day. The increase was astonishing to the industry, and the quoted price has more than doubled since this quarter.
Data from DRAMeXchange, a professional DRAM quotation website under the research institution TrendForce, shows that on the evening of last Friday (the 13th), the spot prices of DDR4 soared across the board. The price of DDR4 8Gb (1G×8) 3200 jumped by 7.8%, with an average price of $3.775; DDR4 8Gb (512M×16) 3200 rose sharply by 7.99%, with an average price of $3.824; and DDR4 16Gb (1G×16) 3200 increased by 7.9%, with an average price of $8.2. In response, an industry insider said bluntly, "We haven't seen such a large single - day increase in spot prices for at least a decade."
Meanwhile, some changes are also occurring among global DRAM manufacturers, which may affect the DRAM landscape in the future.
Micron: A Latecomer Taking the Lead?
Actually, several months before announcing the discontinuation of DDR 4 production, Micron unveiled the prototype of its 10nm sixth - generation (D1c) DRAM. Micron stated that 1γ (1 - gamma) DDR5 represents the company's latest advancement in DRAM manufacturing and is its third - generation 10 - nanometer - class process node. It is expected to achieve a data transfer rate of up to 9200 megatransfers per second (MT/s), a 15% increase in speed compared to its 1β predecessor.
Micron Technology claims that this technology can reduce power consumption by more than 20%, which is crucial for AI and data centers. The enhanced speed and efficiency of 1γ DDR5 will support the expansion of computing power to meet the demands of future AI workloads.
Micron Technology announced that it plans to provide samples of its 1y LPDDR5X 16Gb products to some partners in the second quarter of this year. The company aims to offer industry - leading performance and up to 15% power savings for flagship smartphones in 2026.
In terms of HBM, Micron Technology recently announced that it has delivered samples of its 12 - layer stacked 36GB HBM4 to several major customers. This product uses 1β DRAM process technology and is expected to enter mass production in 2026 to support customers' growth on next - generation AI platforms.
Previously, Micron expected its HBM market share to reach a level comparable to its DRAM market share in the second half of 2025, approximately 20% to 25%.
Sumit Sadana, Executive Vice President and Chief Commercial Officer of Micron, said in an interview with Digitimes that the company's HBM market share will catch up with its overall DRAM share, and it is currently moving towards this goal. The company plans to disclose further growth targets for 2026 at an appropriate time and will invest in customized HBM designs based on customer demand.
It is reported that Micron is expanding its DRAM production capacity in Taiwan and Japan and is preparing for large - scale production. Additionally, the company's new manufacturing plant in Idaho is scheduled to start production in 2027.
Regarding HBM backend packaging, Micron Technology operates in Taiwan and Singapore respectively. Given that HBM requires more clean - room space, Micron Technology will expand its backend production capacity in Singapore to meet future continuous growth needs.
Moreover, a recent report indicated that NVIDIA has selected Micron Technology, an American chip manufacturer, as the first supplier for its next - generation memory solution, SOCAMM. Data shows that the SOCAMM module, designed by NVIDIA and based on multiple LPDDR5X chips, will appear in NVIDIA's upcoming AI accelerator platform, Rubin, which is scheduled to be launched next year. SOCAMM uses copper wire bonding technology, with each module connecting 16 DRAM chips - in contrast to the through - silicon vias of HBM. This copper - based structure can enhance heat dissipation, which is crucial for the performance and reliability of AI systems.
People familiar with the matter revealed that NVIDIA commissioned three major memory manufacturers - Samsung Electronics, SK Hynix, and Micron - to develop SOCAMM prototypes. However, Micron was the first company to receive NVIDIA's approval for mass production, leveraging its advantages in low - power DRAM performance to outperform its larger competitors.
Notably, Micron recently announced that it will invest $200 billion to expand its investment in advanced DRAM manufacturing and R & D in the United States. This will undoubtedly be one of the important decisions affecting the future DRAM landscape.
Samsung: Struggling Forward!
In the past, Samsung has been troubled by HBM issues, and its products have yet to receive customer certification. A report released by GF Securities in Hong Kong on the 11th stated that "Samsung Electronics failed the third HBM3E certification in June, and the next certification is expected to take place in September." Samsung Electronics is currently undergoing NVIDIA's HBM3E certification, and domestic and foreign media and securities firms predict that the HBM3E certification will be completed in June or July this year.
It is reported that Samsung Electronics has also increased the production of HBM3E in advance, preparing to supply the market quickly after certification. However, according to the GF Securities report, the HBM3E certification in June is also considered to have become difficult. Recently, UBS Group, a European financial securities company, also released a report stating that Samsung Electronics' 12 - layer NVIDIA certification for HBM3E is still in progress, and supply is expected to start in the fourth quarter of this year.
However, recent news revealed that Samsung's HBM has gone through a tough test.
According to a South Korean media report, Samsung Electronics has delivered its fifth - generation high - bandwidth memory (HBM) to Advanced Micro Devices (AMD), a major AI chip manufacturer. This has raised expectations that it may also supply high - performance memory to NVIDIA, the world's leading AI chip manufacturer. AMD said on Thursday that its latest MI350 series accelerators use 288GB HBM3E chips from Samsung Electronics and Micron Technology.
This is the first official confirmation from Samsung Electronics that it is supplying HBM3E chips. According to the specifications of the AMD MI350 series, the South Korean chip giant seems to have supplied 12 - layer HBM3E, namely HBM3E 12H, to AMD. Approximately two months ago, Samsung confirmed that it would supply improved HBM3E samples to major customers but did not disclose the names of the customers.
Although it may not have achieved the 100% target set by the company, at the end of May, there were reports that Samsung Electronics had formulated a plan to build a mass - production line for 1c DRAM (sixth - generation 10nm DRAM) at its Hwaseong wafer fab after its Pyeongtaek wafer fab. The investment is expected to be completed as early as the end of this year, and this move is interpreted as an indication that Samsung Electronics is confident in improving the yield rate internally.
1c DRAM is also a key product for Samsung Electronics' "HBM4 (sixth - generation high - bandwidth memory)". Some evaluations suggest that since Samsung Electronics has encountered difficulties in commercializing the latest HBM, it is actively demonstrating its willingness for mass production.
As the latest - generation DRAM that Samsung Electronics plans to mass - produce as early as the end of this year, this DRAM is crucial to Samsung Electronics due to its leading position in the HBM field. Different from major competitors such as SK Hynix and Micron, which use 1b DRAM for HBM4, Samsung Electronics has decided to apply 1c DRAM to HBM4.
Previously, Samsung Electronics started building its first mass - production line for 1c DRAM at the Pyeongtaek Phase 4 Campus (P4) in early 2025. At that time, the investment scale was relatively small, only 30,000 wafers per month. Samsung Electronics has always adhered to the strategy of preparing for the initial mass production of 1c DRAM first and then expanding the investment according to the progress of future product development.
Currently, Samsung Electronics is in discussions to make additional investments to expand the production capacity of 1c DRAM at the P4 factory in the second half of this year, with the scale expected to reach at least 40,000 wafers per month.
In addition, the conversion investment for 1c DRAM is expected to take place at Line 17 of Mars as early as the end of this year.
SK Hynix: Cautious
SK Hynix, the long - time second - place finisher, is the biggest winner in this wave of the AI boom. Thanks to its unparalleled leading position in the high - bandwidth memory (HBM) chip market, SK Hynix Inc. has surpassed Samsung Electronics to become the world's largest memory chip supplier for the first time since its establishment.
Data previously released by market research firm Counterpoint Technology Market Research shows that in the first quarter ending in March 2025, SK Hynix held a 36% market share in the global dynamic random - access memory (DRAM) chip market, ranking first. This is the first time since its establishment in 1983 that SK Hynix has dominated the global memory market.
Samsung Electronics, once the dominant player in the memory field for more than 30 years, has now been pushed to the second place with a market share of 34%, followed by Micron Technology Inc. with a market share of 25%.
However, in this situation, SK Hynix has not been blindly aggressive. Instead, it has been cautious at every step.
According to the latest report from South Korean media, SK Hynix has taken a cautious approach in investing to expand its production capacity of advanced DRAM and HBM (high - bandwidth memory). It is reported that the company is delaying its original plan to introduce equipment to the new factory ahead of schedule, and the time to determine the overall equipment investment scale for this year has also been postponed. Industry insiders further pointed out that SK Hynix's facility investment plan this year, including the Cheongju M15X, is expected to be postponed compared to the original expectation.
M15X is a new production base that will be responsible for the mass production of SK Hynix's advanced DRAM and HBM. The total investment is 20 trillion won, and construction started in the second quarter of last year, with completion expected in the fourth quarter of this year.
As the growth of the artificial intelligence industry is expected to increase the demand for advanced DRAM and HBM, SK Hynix has been actively investing in M15X.
Earlier this year, the infrastructure investment plan, including the clean room of M15X, was advanced from the end of the second quarter to the beginning of the second quarter. Therefore, the equipment introduction time for this factory was also expected to be around September or October, one to two months earlier than the original plan.
However, SK Hynix's stance has recently changed. It is reported that they have decided to postpone the plan to invest in M15X ahead of schedule and delay the equipment introduction time for this factory to around October or November. It is expected that the production capacity of the most advanced DRAM entering M15X this year will also be reduced from 15,000 wafers per month to less than 10,000 wafers. Therefore, it is very likely that a one - time production line for trial production will be built.
A semiconductor industry insider said, "SK Hynix has been discussing advancing facility investment to start mass - producing DRAM at M15X by the end of the year. But as I understand it, the actual investment review and order progress have been postponed." He also added, "The company is not making hasty early investments but plans to fully implement the investment starting from next year."
It is reported that SK Hynix's overall facility investment plan for this year is also being continuously postponed. Although the company has maintained a stable profitability by supplying advanced HBM to NVIDIA, it is adjusting the investment speed in consideration of various management situations.
Meanwhile, SK Hynix also disclosed its future technology roadmap for DRAM below 10 nanometers.
Recently, an SK Hynix executive said that currently, the fine - processing technology using the technology platform is entering a stage where it is increasingly difficult to improve performance and capacity. To overcome this problem, SK Hynix will prepare a 4F square VG (vertical gate) platform and 3D DRAM technology based on innovations in structure, materials, and components below 10 nanometers to overcome technological limitations. SK Hynix explained that the 6F² cell is currently the standard configuration, but combining the 4F² cell with wafer bonding technology (placing circuit elements below the cell area) can significantly improve cell efficiency and electrical characteristics.
The industry generally believes that the manufacturing cost of this technology may increase as the number of stacks increases, but SK Hynix plans to overcome this problem and ensure competitiveness through technological innovation. The company also revealed that it plans to ensure a new growth engine by promoting technological progress in key materials and DRAM components, thereby laying the foundation for the continuous development of DRAM technology in the next 30 years.
The Future of DRAM
According to a report from Techinsights, Samsung and SK Hynix have commercialized products with D1a and D1b cell designs, including DDR5, LPDDR4X, LPDDR5, and LPDDR5X, with a minimum 12nm - class DRAM cell design. Both companies are leading in the adoption of EUV lithography technology, while Micron continues to use ArF - and ArFi - based patterning technology in its 1α and 1β generations and plans to introduce EUV in its 1γ generation. Samsung has extended EUV lithography to five or more masks in the D1a and D1b generations. SK Hynix follows a similar EUVL strategy, has used it in the D1a and D1b generations, and plans to increase the number of EUVL steps in future generations.
High - K metal gate (HKMG) technology is becoming increasingly popular. Samsung was the first to use HKMG in the peripheral structure of D1x GDDR6 chips and extended it to D1y DDR5 chips. Micron has implemented HKMG in D1z graphics DRAM and will extend it to all DRAM types starting from the D1β generation. SK Hynix integrated HKMG in D1y and D1a GDDR6 and recently integrated it in D1b DDR5 devices.
The report further pointed out that at the beginning of next year, major manufacturers will launch mass - produced DRAM using the D1c process. Subsequently, by 2026 or 2027, the final 10 - nanometer - class DRAM devices (D1d or D1δ nodes) will be introduced. By 2030, DRAM technology is expected to shrink to single - digit nanometer nodes, including the 0a, 0b, 0c or 0α, 0β, and 0γ generations. Samsung is developing VS - CAT and VCT 3D DRAM, while SK Hynix and Micron are focusing on vertically stacked DRAM. The future of DRAM technology looks bright and is expected to meet the growing needs of high - performance applications and emerging technologies.
Yole pointed out in a report that despite the increasing challenges of miniaturization, planar DRAM is expected to continue to evolve at the 0c/0d nodes (2033 - 2034) and fully utilize the combination of architectural and process innovations. Currently, the industry relies on the 6F² DRAM cell structure, which will dominate all commercial products in 2025. However, further miniaturization will ultimately require a transition to a 4F² cell based on vertical transistors (VT) and integration in a CMOS - bonded array (CBA) architecture. After the 0c/0d nodes, the transition to a 3D DRAM architecture is expected to be inevitable.
As of 2025, all major DRAM manufacturers, including Samsung, SK Hynix, Micron, and Yangtze Memory Technologies Co., Ltd., are actively exploring multiple architectural paths to achieve 3D DRAM integration.
Meanwhile, a roadmap for HBM has also been disclosed.
