Hangzhou team secures hundreds of millions in financing after breaking international giants' monopoly on advanced chip packaging | Exclusive from 36Kr

Text | Lin Qingqing

Editor | Yuan Silai

36Kr learned that recently, the second - phase project of "Jingtong Technology", a supplier of wafer - level fan - out advanced packaging and Chiplet integration solutions, has received hundreds of millions of yuan in financing. This round of financing was jointly invested by Lihe Capital, Daan Fund, Anji Industrial Fund, and Chenglong Group. The funds will be mainly used for the expansion of the packaging production line in the second phase of the production base, R & D, and market investment. Dumu Capital continued to serve as the exclusive financial advisor.

"Jingtong Technology" is a Chiplet solution provider focusing on wafer - level fan - out advanced packaging technology. Through its independently developed "FOSIP high - density wafer - level fan - out" and "Chiplet Integration small chip system integration" solutions, it uses the "MST Fobic" technology to achieve high - density interconnection with sub - micron line width and multi - chip three - dimensional stacking. It mainly serves chip packaging in fields such as high - performance computing, mobile terminals, and autonomous driving, contributing to the rise of the domestic artificial intelligence industry.

Currently, the global semiconductor advanced packaging market is growing rapidly. Yole data shows that the market size of fan - out packaging was $2.738 billion in 2023 and is expected to increase to $3.8 billion by 2028 at a compound annual growth rate of 12.5%. Among them, the ultra - high - density fan - out packaging segment has the fastest growth rate (30% compound annual growth rate). The global Chiplet market size will grow from $3.1 billion in 2023 to $107 billion in 2033, with a CAGR of approximately 42.5%. The market driving force comes from the demand for high - computing - power chips in 5G communication, AI chips, and autonomous driving. Traditional packaging technologies are difficult to meet the high - density integration requirements of chips with a process of 14 nanometers and below.

Jiang Zhenlei, the general manager of "Jingtong Technology", pointed out that "Currently, more than 90% of the market share of ultra - high - density fan - out packaging and small chip integrated packaging is controlled by international giants such as TSMC and Samsung. The Chinese mainland still lags behind in overall process and production capacity."

Based on this, "Jingtong Technology" has laid out the market through two independently developed technology paths: "FOSIP wafer - level fan - out" and "Chiplet Integration small chip system integration". Among them, the FOSIP wafer - level fan - out advanced packaging process technology is comparable to the solutions of international leading FO manufacturers, enabling three - dimensional stacking with an internal interconnection density of 2 - 5 micron line width. The internal interconnection density of Jingtong's small chip integration technology with embedded silicon bridges can reach below 0.5 microns. Jingtong has currently carried out solution docking and engineering verification with customers in multiple fields such as mobile phones, medical, image processing, and edge computing.

Jiang Zhenlei introduced that "Jingtong's 'bridge die + FO' technology, namely the 'MST Fobic' technology, replaces the interconnection interposer with a silicon bridge and replaces the ABF substrate layer with a high - density RDL redistribution layer, significantly reducing the packaging thickness. This solution reduces the cost by at least 30% compared to the CoWoS solution. More importantly, Jingtong's packaging solution can not only meet the thinning requirements of SoC, processors, computing power chips, and edge - side AI servers in mobile phones, computers, tablets, and various AI terminals but also meet the requirements of high - density interconnection, high bandwidth, and high communication speed inside AI chips. This is a unique technological capability in China at present. Currently, Jingtong is making the final preparations before mass production."

36Kr learned that the current monthly production capacity of Jingtong Technology's Yangzhou production base is about 10,000 pieces for bumping/wlcsp/ewlb, or 2,000 - 3,000 pieces of high - end production capacity for Fosip/Fobic. Its customers cover many well - known companies in fields such as mobile phones, GPUs, and AI chips.

Technologically, the company has built the full - process capabilities from design simulation, interposer processing to packaging testing, and holds more than 90 patents including the "Chiplet Integration small chip system integration" process.

At present, "Jingtong Technology" is promoting the localization verification of packaging equipment and materials. The goal is to gradually increase the monthly production capacity to 8 - 10 times the current level through the expansion of the second - phase production capacity and achieve large - scale mass production of the MST Fobic technology.

Jiang Zhenlei believes that "The next three years will be the explosive period of Chiplet technology. Especially for large - model inference chips and autonomous driving domain controllers, the demand growth rate for wafer - level packaging will exceed 40%. As the process below 3nm approaches the physical limit, the value proportion of advanced packaging in the semiconductor industry chain will increase from the current 15% to over 25%. This window period is at most five years."

The core members of the "Jingtong Technology" team come from global leading manufacturing and packaging companies in the integrated circuit field such as Applied Materials, Apple, Intel, and ASE. The technical advisor, Yan Xiaolang, is the leader of the microelectronics discipline at Zhejiang University. Wang Xin, the deputy general manager of R & D, has more than a decade of experience in high - end fan - out and Chiplet packaging R & D projects in foreign large enterprises. Jiang Zhenlei, the general manager, has 16 years of entrepreneurial experience in the packaging industry. The production team mainly comes from domestic packaging giants such as Huatian Technology and Tongfu Microelectronics.

Views of investors:

Dai Yunqiu, a partner of Daan Fund, said: Fan - out packaging is the core driving force for heterogeneous integration and will reshape the value distribution of the semiconductor industry chain. As TSMC's InFO (Integrated Fan - Out) technology is adopted by giants such as Apple and NVIDIA, their capital expenditure is tilted towards advanced packaging, and the proportion of the packaging link in the semiconductor value chain has increased. Fan - out packaging has traditionally focused on the high - end market (such as smartphone APUs and server GPUs), but its potential for disruptive innovation is emerging. Jingtong Technology occupies a key position in the cycle of the explosion of AI computing power, and its silicon bridge solution is expected to enter the supply chains of domestic "NVIDIA" and "AMD". With its independently controllable patented technology, Jingtong Technology has become a key force for domestic substitution. It focuses on the high - end fan - out packaging segment and forms a differentiated advantage through the "Chiplet + fan - out" integration solution. We believe that against the background of Sino - US competition, Jingtong Technology will soon enter the global first - tier in the field of fan - out packaging with its technological breakthroughs.

Tang Yue, a partner of Lihe Capital, said: As the development of semiconductor manufacturing processes faces bottlenecks and the United States restricts China's processes above 14nm, advanced packaging technologies and Chiplet architectures have become an inevitable trend in the industry. Among them, the Fan - out technology, as one of the mainstream technologies in the advanced packaging field, also provides an important platform foundation for Chiplet integration solutions. In the field of Chiplet packaging, TSMC's CoWoS and InFO technologies dominate. CoWoS mainly serves customers such as NVIDIA, Google, AMD, and Amazon. Chinese enterprises are more sensitive to costs in order to solve the process problem through chiplet, which is exactly the area where Jingtong's advanced packaging technology has an advantage. Jingtong Technology was the first in China to master high - density wafer - level fan - out (Fan - out) packaging and small chip integration technologies. Based on this, it provides full - chain OEM services from wafer - level fan - out packaging, Fan - out PoP stacking packaging to multi - chip hybrid packaging, and then to Chiplet Integration small chip integration. These technologies are widely used in many fields such as mobile phones, GPUs, and AI chips, demonstrating the company's strong development potential and broad market prospects.