CoolSi Semiconductor explores the upgrading of LED display through chips and packaging.

The OpenRoll project of Cool Silicon Semiconductor is exploring a product route that supports FPC flexible rollable displays with high-voltage series LED driver ICs and all-in-one packaging. The project focuses on the original 24V/36V high-voltage series LED driver IC and MP-AMIP-16 lamp-driver integrated packaging, aiming to drive the coordinated upgrading of fine-pitch displays in terms of power supply, manufacturing, panel form and maintenance methods. The project plans to promote a total capital plan of RMB 100 million in accordance with milestones, with the first phase being about RMB 5 million.

From Driver IC to Packaging, Solving System-Level Problems of Flexible Displays

The shift of LED displays to fine-pitch and flexible forms involves far more than the shape of the display panel. Driving, power supply, packaging, mounting and maintenance require collaborative design within the same system. How to balance pixel density, slim and light structure and maintainability is the problem that OpenRoll aims to solve.

According to the business plan provided by the team, OpenRoll explores the product route covering IC, packaging, flexible board and finished display products, centering on the original 24V/36V high-voltage series LED driver IC, combined with 16-in-1 lamp-driver integrated packaging and FPC flexible circuit board. Among them, 24V/36V refers to the LED series driving and power supply solution, which is not equivalent to the display panel being directly connected to the municipal power supply.

The packaging solution MP-AMIP-16 is planned to integrate the driver IC with 16 sets of RGB pixels. According to the structural design in the BP, the P0.6 solution corresponds to a 2020-level package of 2×2 millimeters, with 6 pins on the back. The team hopes to create conditions for flexible board mounting and on-site single-unit replacement by integrating pixels and enlarging the operable packaging unit, while taking into account the performance of fine-pitch displays.

The power supply architecture and packaging architecture are the two fulcrums of this solution. The BP lists a single-end power supply of more than 3 meters for the 24V solution as a technical goal, hoping to provide more space for the power supply and wiring design of flexible LED displays. The actual power supply length and segmentation method need to be determined in combination with load, line width, temperature rise and system test. The above specifications and maintenance capabilities still need to be confirmed through sample tests and system verification of the same specifications.

From Fine-Pitch to Flexible Displays, Promote the Upgrading of Display Manufacturing and Maintenance

The industrial value of this technical route lies in redesigning the driving, packaging and panel structure as a whole. The team hopes that the high-voltage series driving and multi-pixel integrated packaging can work synergistically to provide a new implementation path for slimness, flexibility and maintainability while retaining the fine-pitch display capability.

In the manufacturing link, MP-AMIP-16 integrates multiple RGB pixels into one packaging unit. According to the team's design idea, the pixel pitch and the size of the mounting unit can be considered separately: the display side still pursues fine pixels, while the mounting side adopts a relatively larger packaging unit to explore the assembly of fine-pitch LEDs on FPC flexible boards. Its mounting yield, bending adaptability and batch consistency need to be verified in actual processes.

In the maintenance link, the team hopes to create conditions for manual replacement of a single lamp-driver package in P0.6 fine-pitch displays through the 2×2 mm package and 6-pin structure, and plans to reserve spare parts of the same batch with the display panel to reduce the risk of color difference after replacement. Whether stable on-site rework can be realized and the reliability after rework still needs to be confirmed through sample and system tests.

In terms of panel form, the combination of high-voltage series driving and flexible board design aims to expand the bendable and rollable LED display forms, and explore the system layout where the display panel is separated from the power supply. The team's concerned applications include commercial displays, exhibition and event displays and other scenarios. The differences in power supply distance, temperature rise, weight and system cost compared with existing solutions will be evaluated with the test results of the same specifications, and no general conclusion of superiority will be drawn in advance.

From IC to packaging and then to the display system, this route aims to drive not only the replacement of a single device, but also the coordinated upgrading of power supply architecture, mounting method, panel structure and maintenance method. Whether the above industrial upgrading direction can be transformed into replicable product capabilities still depends on the chip tape-out, packaging reliability and complete system verification.

Restart R&D and Quality Verification, Financing Promoted in Accordance with Milestones

The applicant of this project is Cool Silicon Semiconductor Technology (Shanghai) Co., Ltd., which was founded in March 2017 with its headquarters in Shanghai. ZOU Jianshun, the CEO, has been engaged in the LED industry for more than 15 years. According to the team's introduction, FEI Xiaojiong, the CTO, holds a master's degree in microelectronics from Fudan University, has more than 20 years of chip R&D experience, once served as a senior engineer of MCU digital design at Texas Instruments, and has R&D experience of multiple chips from design to mass production.

ZOU Jianshun said that the past packaging routes and batch quality problems have made the team pay more attention to reliability and mass production consistency. In the past two years, the team has focused on promoting the upgrading of chips and packaging, hoping to get through the verification links of chips, packaging and systems before entering large-scale production.

The current route is still in the stage of upgraded R&D and engineering verification. According to the BP's plan, it takes about one year from chip finalization to tape-out. After tape-out, tests on function, voltage, temperature rise and refresh rate will be carried out, followed by verification of mounting yield, aging, thermal shock, EMC and maintenance. Indicators such as power supply distance, bending life and batch cost shall be subject to actual measurement results; historical engineering experience does not mean that the new generation of solution has completed mass production verification.

In terms of financing, the project has not yet completed external financing. The BP proposes a three-stage capital plan with a total of RMB 100 million: the first phase of about RMB 5 million is used to jointly launch a new company and prepare for R&D and verification of chips and packaging; after the test reaches the standard, it is planned to invest about RMB 15 million for mass production introduction and trial operation; the remaining about RMB 80 million is planned to be invested in the verified business after the operating data meets the standards. All phases are premised on technical and operational milestones, and are not already received financing.

The BP also proposes that the boundaries of debts, assets and intellectual property rights of the newly established company should be clarified with the original company, and relevant technologies and assets should be used after the ownership is clear or legal licenses are obtained. The team hopes to connect with investment institutions in the fields of semiconductors, advanced packaging and new displays, as well as industrial partners willing to participate in joint verification.

Project Contact: ZOU Jianshun