Sound Ecosystem and Scenario Breakthroughs: Seven Sub-forums of RISC-V China Summit Jointly Explore New AI Opportunities
On October 19, the 6th RISC-V China Summit opened at Shenzhen Convention and Exhibition Center (Futian). As one of the most influential industry events in the global open-source chip sector, this summit brings together the world's top chip design enterprises, software service providers, scientific research institutions and industry experts.
On October 20, seven parallel sub-forums were held simultaneously, covering seven core directions in depth: artificial intelligence, data center and high-performance computing, software ecosystem, chip design and verification, automotive electronics, industry and robotics, embedded systems, IoT and smart hardware, as well as industry-university cooperation, innovation and entrepreneurship.
From being an alternative solution in the early years to a must-win arena that major tech giants are competing to lay out now, RISC-V is expanding at an unprecedented speed from embedded and IoT scenarios to high-computing-power, high-value-added scenarios. Through the seven sub-forums of this summit, a clear path for RISC-V industrial leapfrogging from underlying hardware innovation, full-stack software ecosystem co-construction to multi-scenario large-scale implementation is clearly visible.
Breaking boundaries, full acceleration of multi-scenario commercialization
With the continuous integration of vector extensions and dedicated computing power, RISC-V is strongly entering high-value tracks such as artificial intelligence, data centers and automotive electronics, demonstrating amazing commercial explosive power.
At the Artificial Intelligence Sub-forum, enterprises and scientific research institutions including Cadence, DAMO Academy, SiFive, Andes Technology, MIPS, ESWIN Computing, ZTE, Institute of Computing Technology of the Chinese Academy of Sciences attended and shared their insights. The forum focused on cutting-edge topics such as AI-oriented open matrix architecture, deployment and verification of large models on RISC-V AI cores, and AI IP and supporting software stack design.
According to the sharing of Red Hat, the real threshold of AI does not lie in the model, but in system integration and security assurance, and the full-stack open-source ecosystem of RISC-V already has the capability to run AI. Nuclei System Technology shared the core role of RISC-V in AI chips and IP solutions, and believes that RISC-V, with its dynamic vector length, open and extensible instruction set and unified software ecosystem, is a suitable ISA for the AI era, which can cover full-scenario AI computing power requirements from the cloud to MCUs.
At the Data Center and High-Performance Computing Sub-forum, high-performance processors and server platforms became the focus, and enterprises and scientific research institutions including ZTE Microelectronics, Hyperion Tech, Institute of Software of the Chinese Academy of Sciences, Beijing Open-Source Chip Research Institute, Alibaba DAMO Academy attended and shared their insights. The forum focused on topics such as RISC-V privilege architecture extensions for servers, high-performance processor core design, and memory security isolation technology based on RISC-V processors.
Alibaba DAMO Academy focused on the extension of the underlying instruction set and hardware-software co-design at the sub-forum, proposing to release the vector potential of RISC-V and make up for the shortcomings of underlying computing power. At present, DAMO Academy is deeply involved in the standardization of the RISC-V international community. Dblink Computing demonstrated its full-stack RISC-V product matrix and technical strength from the end side to the cloud side, proving that RISC-V already has the commercial implementation capability to support AI data centers and high-density computing scenarios.
At the Automotive Electronics, Industry and Robotics Sub-forum, leading enterprises including IAR, Nuclei System Technology, Bauhinia Semiconductor, Zhaosong Technology, Alibaba DAMO Academy attended and shared their insights. The forum focused on topics such as RISC-V software development in safety-critical fields, the practice of RISC-V in in-vehicle and robot real-time control, RISC-V automotive-grade MCU architecture innovation and engineering implementation.
Bauhinia Semiconductor focused on the topic of RISC-V driving automotive chip innovation and domestic mass production, demonstrating the mass production practice of Bauhinia Semiconductor incubated by Great Wall Motors. Its independently developed Bauhinia M100 has become the world's first mass-produced RISC-V automotive-grade chip for vehicle installation. From the perspective of software development toolchains, IAR analyzed three major challenges faced by RISC-V in the automotive, industrial and robotics fields. To this end, IAR launched RISC-V development tools, which consolidated the software foundation for the compliant development of RISC-V in safety-critical fields.
At the Embedded, IoT and Smart Hardware Sub-forum, the foundation of RISC-V is being consolidated more solidly. Enterprises and scientific research institutions including ESWIN Computing, WCH, Nuclei System Technology, Institute of Software of the Chinese Academy of Sciences attended and shared their insights. The forum focused on topics such as RISC-V enabling high-performance computer peripherals, full-scenario RISC-V embedded development platforms, and software verification in RISC-V chip mass production.
The RISC-V Industry Working Group focused on the construction of a hardware-software co-design ecosystem in the end-side AI era, believing that RISC-V, with its open and extensible features, is becoming the best foundation for the intelligent interconnection of all things era, which helps to generate scale effects in smart home, consumer electronics and other fields, and promotes the mature development of the open-source hardware-software coordinated intelligent IoT ecosystem.
Consolidating the foundation, building new open-source advantages through full-stack ecosystem collaboration
If rich application scenarios are the practical practice of RISC-V boundary expansion, then mature chip design and verification tools, adapted software operating systems and in-depth integration of industry, university and research are the cornerstones supporting its long-term development. At the three sub-forums of Chip Design and Verification, Software Ecosystem, Industry-University Cooperation and Innovation & Entrepreneurship, co-construction, open source and collaboration have become high-frequency keywords.
At the Software Ecosystem Sub-forum, enterprises and institutions including Institute of Software of the Chinese Academy of Sciences, SiFive, Red Hat, Alibaba DAMO Academy, Dblink Computing attended and shared their insights. The forum focused on core topics such as the evolution and practice of RISC-V debugging toolchains, high-performance RISC-V compilers, and maturity assessment of the RISC-V basic software ecosystem, deeply discussed the pain points and solutions of hardware-software co-design, accelerated the maturity of the basic software stack and the integration of the open-source community, and laid a solid software ecosystem foundation for RISC-V to evolve from "usable" to "user-friendly".
The sharing of Red Hat focused on how Linux distributions can close the loop of RISC-V from academic innovation to industrial implementation. It believes that with the full support of mainstream distributions for RISC-V and the in-depth adaptation of AI frameworks, the full-stack software foundation of RISC-V already has the capability to run well and even deliver a user-friendly experience. The Institute of Computing Technology of the Chinese Academy of Sciences carried out a quantitative assessment of the maturity of the RISC-V basic software ecosystem for data centers, and predicted that by leveraging the flexibility of ISA and strengthening open-source collaboration, the RISC-V basic software ecosystem for data centers is expected to mature before 2030.
At the Chip Design and Verification Sub-forum, representatives from industry, university and research circles including Synopsys, Tenstorrent, ZTE Microelectronics, Beijing Open-Source Chip Research Institute, Southeast University attended and shared their insights. The forum focused on key technical topics such as security architecture design and implementation of high-performance RISC-V chips, efficient R&D of RISC-V custom SoCs, and building a general base for domain-specific chip design based on RISC-V, directly addressing the design and verification challenges in the chip implementation process, and sharing cutting-edge tools and verification methodologies.
Synopsys shared how to use AI and hyper-convergent EDA tools to accelerate the design and implementation of high-performance RISC-V chips, providing a predictable path to success for high-performance RISC-V design delivery. ESWIN Computing focused on the architecture design and practice of high-performance RISC-V chips in the field of confidential computing and security defense, calling on the industry to actively contribute practices during the standardization window period, and jointly promote the standardization and commercialization of the RISC-V security ecosystem.
The rise of RISC-V has broken the original architectural barriers, bringing unprecedented innovation opportunities to academia and start-ups. The Industry-University Cooperation, Innovation and Entrepreneurship Sub-forum revealed that the source of continuous prosperity of RISC-V lies in talents. Representatives from industry, university and research circles including City University of Hong Kong, Nuclei System Technology, Institute of Computing Technology of the Chinese Academy of Sciences, Kylin Software attended and shared their insights. The forum focused on topics such as RISC-V talent cultivation, co-construction of RISC-V AI open-source innovation and talent ecosystem, and practice of RISC-V industry-university-research collaborative innovation ecosystem.
The OpenAtom Open Source Foundation shared that to move towards large-scale application, RISC-V needs to simultaneously improve four capabilities: talent supply, software ecosystem, collaborative innovation and achievement transformation. openKylin connects universities, scientific research institutions, enterprises and developers into a collaborative innovation network through the operating system platform and open-source community mechanism. The College of Computing of the City University of Hong Kong shared that open source and commercialization are not mutually exclusive paths. Open source reduces the cost of learning and trial, and what enterprises purchase is reliability, compatibility, continuous maintenance and responsibility commitment, among which talents are the knowledge carrier connecting universities, communities, standards and enterprises.
Looking at the seven sub-forums of the 6th RISC-V China Summit, it is clear that RISC-V has gone beyond the initial nascent stage of "whether it can be used" and entered the stage of being user-friendly and commercially available. Catalyzed by the AI wave and driven by the demand for new energy vehicles and data centers, RISC-V is achieving leaps in hardware performance, security architecture and software ecosystem, but long-term collaboration among chip manufacturers, software vendors, end users and the open-source community is still required.
On the stage of the 6th RISC-V China Summit, which gathers global open-source forces, RISC-V has sent a clear signal to the world: a golden moment belonging to open source is coming at an accelerated pace.