Take a key step forward in replacing silicon

Singapore-based startup Nexstrom announced on September 22, 2026 that it has closed a $12 million seed financing round led by Xora Innovation. The proceeds will be used for the commercialization of its "North Star" device, which can directly grow two-dimensional semiconductor materials, Transition Metal Dichalcogenides (TMD), onto 300mm (12-inch) wafers.

In June 2026, ASML, TSMC and imec demonstrated the integration of 2D transistors on 300mm wafers, but their channels were grown on separate substrates before being transferred to the wafers. Whether high-quality thin films that meet the requirements of large-scale production lines can be directly grown on wafers is the exact question Nexstrom is trying to answer. A comparison of the company's documents and management statements reveals discrepancies in their descriptions of target timelines: whether it is "achieved on 300mm wafers" or "scheduled to be completed by the end of October".

According to introductions, Nexstrom is an investor-founded company. Its official website shows that the firm was founded by Lance Li and Xora Innovation in 2024. Nexstrom was born under Xora's startup incubation framework, which means the investment firm has been involved from the very early stage of the enterprise. Xora is reported to be a Temasek-backed venture capital firm. SEEDS, which participated in the investment, is a government-affiliated investment institution under SG Growth Capital, an investment arm of Enterprise Singapore and the Economic Development Board (EDB) of Singapore.

Multiple members of the management team have research experience at TSMC. Dr. Phoebe Tan, CEO, is one of the co-founders, and Dr. Lance Li, Chief Scientist, once led TSMC's research on post-silicon electronic devices. Dr. Li has been committed to the research of chemical vapor deposition (CVD) of single-crystal molybdenum disulfide (MoS₂) since 2012, and the press release notes that he has been listed as a Highly Cited Researcher by Clarivate since 2018. Professor Philip Wong of Stanford University, who served as TSMC's Vice President of R&D from 2018 to 2020, has now joined the board as an advisor.

This company sells chip material cultivation equipment rather than chips themselves. According to the Singapore Economic Development Board (EDB), one in ten semiconductors and one in five semiconductor devices worldwide are manufactured in Singapore. Nexstrom is not positioned to compete with wafer foundries, but to act as a supplier of materials and equipment. With government-linked investors participating in the financing, the company started out as an equipment firm, and Singapore itself is a country with a highly concentrated equipment industry.

Expected to Replace Silicon?

To shrink the size of transistors, the channel that serves as the current path must also be extremely thin. According to imec, when the thickness of a silicon channel drops below 10 nanometers, both mobility (the ease with which electrons move) and on-state current will decrease significantly. Transition Metal Dichalcogenides (TMD) are crystals in which metals such as molybdenum and tungsten are arranged in layers with elements such as sulfur and selenium, with a single layer thickness of only about 0.7 nanometers.

TMD materials can use the inherent thickness of the crystal to fabricate channels that are thinner than the threshold thickness at which silicon materials experience performance degradation. Precisely because of this property, TMD materials are regarded as candidate materials for next-generation channel applications.

However, being thin alone is not sufficient to fabricate transistors. A review published by Das et al. in the *Nature Electronics* journal in 2021 points out that even the transition metal dichalcogenides (TMD) with the best performance have a contact resistance with metals that is one order of magnitude higher than that of highly doped silicon. Gouri Sankar Kar from imec also explained that in 2D TMD, to reduce contact resistance, the contact area must be increased, which hinders its miniaturization.

Another obstacle lies in the thin film itself. An article published by Intel in October 2024 notes that 2D semiconductors cannot achieve mass production without higher-quality and stable thin films. In the same article, CEA-Leti explains that the best CVD thin films are grown on substrates such as sapphire at temperatures exceeding 600°C. Even if high-performance thin films exist, there is no guarantee that the same quality can be maintained at every position across the entire silicon wafer.

Nexstrom is working to break through the thin-film part of these two major obstacles. Dr. Li stated in the press release: "The challenge is not to demonstrate the potential of 2D materials, but how to produce them at the scale and quality required by advanced fabs." Professor Wong commented: "The industry needs high-quality, uniform 2D materials on 300mm substrates." The contact resistance issue remains an area that the company's equipment cannot directly address.

Outlook of North Star

The North Star product is a device that can directly grow TMD (full microstructure deposition devices) on 300mm (12-inch) wafers. Its official website describes it as a cold-wall CVD system, and states that by 2025, it has expanded its MOCVD (Metal-Organic Chemical Vapor Deposition) platform to 100mm wafers. The question is, how much progress have they made with 12-inch wafers?

A comparison of the company's own statements shows inconsistent tenses. The company profile in the press release uses the perfect tense to state that they have "developed the industry's first platform for manufacturing 12-inch single-crystal 2D semiconductors". However, the main body of the same press release uses present continuous tense, stating that it is "striving toward the industry's first 12-inch 2D wafer growth goal". The timeline on its official website lists "achieving commercial-grade TMD synthesis on 300mm wafers" under the 2026 entry.

CEO Phoebe Tan mentioned another phase in an interview with TechCrunch. She said that they have achieved substantial results on wafers using the newly installed 12-inch equipment, and explained that the process has been gradually scaled up from 2-inch to 6-inch, with "plans to complete the scaling of 8-inch and 12-inch by the end of October". In other words, although the press release and official website claim that they have achieved TMD growth on 300mm wafers, the CEO stated that the completion of the 12-inch process is expected by the end of October 2026.

The two statements can be compatible, as using a 12-inch machine to test materials and completing a 12-inch processing flow may refer to different stages.

However, at present, readers can only know that the 12-inch machine has been put into operation, and material test results have been released. The CEO herself has not stated that they have perfected a stable growth process for mass-producing 300mm wafers. No third-party quality assessment reports for 300mm wafers have been made public yet. According to TechCrunch, some companies in the industry are testing samples, but the names of these companies have not been disclosed.

The term "industry-first" also needs to be used with caution. CDimension, a company based at the Massachusetts Institute of Technology, announced that it would achieve 2D material growth on 300mm wafers in July 2025. Whether this claim is valid depends on the definition criteria of "first", such as whether the material is single-crystal.

Performance data also follows the same pattern. The official website lists performance indicators such as "defect density reduced by up to 1%", "switching power consumption reduced by up to 75%" and "gate length more than doubled", but does not specify what these data are compared with, nor the wafer diameter used and measurement conditions. The implications of these data will vary significantly depending on whether the comparison object is a silicon thin film fabricated by other growth methods or a TMD thin film. At present, we can only interpret these data as claims made by the company.

Three Approaches to Loading Thin Films onto Wafers

In June 2026, ASML, TSMC and imec announced that they had successfully fabricated n-type transistors (nFETs) using MoS₂ and p-type transistors (pFETs) using WS₂ or WSe₂ on the same 300mm wafer. The contacted poly pitch (CPP, the spacing between gate electrodes) is 50nm, and 94% of the transistors are functional. The channel material was a thin film grown elsewhere and transferred to a wafer pre-patterned with tungsten embedded trenches. All three industry leaders demonstrated 300mm integration schemes using transfer technology rather than direct growth.

The reason for choosing the transfer process lies in temperature. According to imec, directly growing 2D materials on wafers usually requires a temperature of around 1000°C. The transfer process, which transfers a thin film grown on a separate substrate to a wafer, only requires a temperature of around 300°C.

The back-end-of-line (BEOL) process for creating wiring layers and the process on the back side of the wafer must be kept below 400°C to avoid damaging the already fabricated devices. If 1000°C growth is performed on a wafer that is still being processed, the underlying circuits cannot withstand the high temperature. Therefore, high-temperature growth is carried out in a separate area, followed by transfer using a low-temperature transfer process; this is a division of labor.

CDimension, a spin-off from the Massachusetts Institute of Technology, is trying to break through this bottleneck by controlling temperature. In July 2025, the company announced a unique process that can grow single-layer molybdenum disulfide (MoS₂) on the entire surface of a 300mm wafer at a temperature of about 200°C, and claimed that this process can cut the time to practical application in half. According to IEEE Spectrum, the announcement stated that the growth temperature is controlled below the BEOL (low power consumption limit) threshold of 400°C.

Methods for depositing 2D materials onto wafers generally include: direct growth at a temperature of about 1000°C; growth on a separate substrate followed by transfer at a temperature of about 300°C; and low-temperature growth at about 200°C by CDimension. Nexstrom claims that it can directly grow thin films up to 300mm, but has not disclosed its growth temperature. In the temperature column, Nexstrom is the only entry without a stated value. Depending on the growth temperature of Nexstrom's thin films, they can be deposited directly on wafers for device fabrication, or used as raw materials for front-end processes after being grown on separate substrates and then transferred.

The common point between Nexstrom and CDimension is that both claim to "directly grow on wafers". The difference lies in the focus of their public promotion. CDimension emphasizes temperature control, while Nexstrom highlights the 300mm diameter and single-crystal quality. Dr. Li has been committed to the research of single-crystal MoS₂ growth since 2012, and the company's emphasis on quality uniformity is consistent with this background.

Can 12-inch Equipment Be Ready in Time

According to TechCrunch, Nexstrom expects to be ready for the commercialization of its equipment between 2030 and 2035.

Within two years after its establishment in 2024, Nexstrom expanded the wafer diameter from 2-inch to 6-inch, and plans to complete the 8-inch and 12-inch processes by the end of October 2026. However, the company expects to be ready for commercial production between 2030 and 2035, which coincides with imec's announcement that it will introduce 2D materials into peripheral devices starting from the A7 node (around 2030). imec says it will use 2D materials in peripheral devices (such as BEOL and planar transistors located on the back side of the wafer) rather than in the channels of state-of-the-art transistors. The 2030 timeline for the A7 node is based on a 2023 roadmap report, which may have been revised since then.

From this perspective, this overlap has a prerequisite. The initial application areas listed by imec (BEOL and backside surfaces) are precisely the areas where the temperature must be kept below 400°C. To directly introduce grown thin films into these areas, the thin films must be grown at low temperatures or combined with transfer technology. Since Nexstrom has not yet announced its growth temperature, the information currently available cannot confirm whether its equipment meets the temperature range of initial applications.

There are also factors that may delay the launch timeline. In October 2024, Kar from imec pointed out that CFET (a structure with vertically stacked nFET and pFET) can extend the miniaturization of silicon chips by up to 20 years. If the lifespan of silicon chips is extended, the demand for advanced nodes using 2D materials for channels may be delayed accordingly. Intel's O'Brien once mentioned that the consistency of thin film quality is a prerequisite for achieving mass production, but third-party evaluation data of Nexstrom in this regard have not been released to the public.

There are three factors to consider, sorted by importance as follows: Can they prove that the 8-inch and 12-inch processes have been completed as scheduled by the end of October? Will they disclose the comparison targets for growth temperature and performance indicators? Will the names of the companies testing the samples and their evaluation results be made public? If all three conditions are met, and a third party confirms that uniform single-crystal thin films can be reproduced across the entire 300mm surface, then the foundry will have an external 2D material supplier, and the material supplier (in the form of specific equipment) required by imec to phase in this technology in the 2030s will also emerge.

This article is from the WeChat official account "Semiconductor Industry Watch" (ID: icbank), written by the Editorial Department, and published with authorization from 36Kr.