AI has begun to "design chips". The three global EDA giants are waging fierce competition, bringing a golden window of opportunity for Chinese manufacturers.

Recently, the topic of "AI automatically designing chips" has become extremely popular.

Last month, domestic large model enterprise Kimi completed the full experiment of independent chip design using the K3 model, and finished testing on the EDA platform. The entire process ran autonomously by AI for 48 hours, without using any commercial licensed software from Cadence or Synopsys. This news quickly drew industry-wide attention: are engineers no longer needed for chip design? Are commercial EDA software completely unnecessary?

In-depth analysis shows that the replacement is still very far away. The chip designed by Kimi roughly corresponds to the technical level of 20 years ago, and its operating frequency is 20 to 30 times lower than that of current advanced chips. In addition, although open-source EDA tools have existed for decades, practical design still requires commercial systems.

However, AI is indeed effectively reshaping the working methods of chip design. Agentic AI has begun to penetrate the EDA process, including generating RTL code, automatically creating test environments, and invoking simulation, formal verification and debugging tools. Global EDA vendors are also enthusiastic about this and continue to increase investment. AI has become the key for domestic EDA vendors to provide differentiated solutions.

It can be said that the competition in the AI EDA field has officially kicked off.

Three Giants Bet Big on Agentic AI

At the just-concluded 2026 DAC Chips to Systems conference, the world's three leading EDA vendors, Synopsys, Cadence and Siemens EDA, almost simultaneously showcased their respective Agentic AI layouts, each demonstrating their unique advantages, and the ideas of the three vendors are quite different.

Let's first briefly analyze the attitudes of the three vendors towards Agentic AI and their layouts in AI EDA.

Synopsys

First, Synopsys has launched a fully autonomous Design and Verification (DV) agent and an autonomous thermal simulation workflow based on Ansys Icepak, integrating efforts in both depth and breadth dimensions. In terms of depth, its fully autonomous Design and Verification (DV) can directly decompose verification objectives from specification documents and design inputs, and realize closed-loop control from test plan generation to coverage convergence and debugging. This breakthrough is positioned to rival Cadence's previously released ChipStack.

In terms of breadth expansion, Synopsys is making efforts in three major directions: realizing a fully autonomous CAE workflow for GPU heat dissipation simulation using Ansys Icepak; delivering an autonomous analog/mixed-signal workflow that improves efficiency by up to 3 times in Custom Compiler layout synthesis; and launching more than 20 GPU-accelerated EDA and multiphysics tools. In addition, by migrating tools such as Fusion Compiler to Microsoft Azure and the Discovery platform, Synopsys has become the only EDA vendor that can run mature Agent workflows on the two major computing power giant platforms, effectively avoiding the risk of computing power binding.

Synopsys has the deepest AI accumulation and entered the AI EDA field earlier than Cadence. It launched DSO.ai based on reinforcement learning in 2020, followed by Synopsys.ai Copilot, and released AgentEngineer in 2026, which is its landmark masterpiece of integrated Agents. Synopsys proposed L1-L5 AI autonomy levels similar to autonomous driving:

Knowledge-assisted phase (L1): Integrate knowledge base based on LLM to support engineer query and interaction;

Task execution phase (L2): Develop task-specific agents to handle specific tasks such as fixing DRC violations and resolving RTL link errors. At present, Synopsys' "Agent Engineer" has reached the L2 level and can independently complete specific tasks;

Multi-agent collaboration phase (L3): Multiple task agents work collaboratively. For example, after the DRC error repair agent identifies a problem, it links with the timing optimization agent to adjust the design. At present, Synopsys is in the early deployment stage, and some customers have started trial use;

Planning and coordination phase (L4): Multiple agents can learn and reason autonomously to collaboratively complete complex design planning;

Autonomous operation phase (L5): Engineers only need to set design requirements, and agents can independently complete the full-process design of subsystems, modules or chips.

Synopsys' L4 demo is currently in the demonstration stage, and the overall development is at the L3 stage. At present, Synopsys' AI capabilities are mainly reflected in links such as script generation and verification assistance. For example, the efficiency of some tasks has been increased by more than 10 times, and the full autonomous completion of complex design processes has not yet been realized.

Another noteworthy signal is that in November 2025, NVIDIA invested 2 billion US dollars in Synopsys, and the two sides carried out cooperation in fields such as Agentic AI, digital twins and cloud EDA. With the support of the Grace Blackwell platform, EDA workloads are expected to achieve a 30-fold performance improvement.

Cadence

The second is Cadence, whose competitive strategy focuses on architectural completeness. If Synopsys focuses on breaking through the depth of design verification, Cadence places more emphasis on coverage. Cadence has launched the AuraStack AI Super Agent, which together with the previously launched ChipStack, InnoStack and ViraStack covers links including verification, digital implementation, analog design, and PCB/package, forming an AI design process from chip to system.

Previously, Cadence had shortcomings in the multiphysics field, and AuraStack fills this gap. According to official data, AuraStack improves the performance of multiphysics analysis in signal integrity, power integrity, electromagnetic and thermal simulation by 20 times, and speeds up the design workflow by 15 times. At present, NVIDIA engineers have applied it to the development of their own AI infrastructure. However, before the final completion of the integration of Hexagon's design and engineering software, Cadence still relies heavily on NVIDIA's underlying physical library and hardware acceleration at the physical signoff level.

Cadence is the most aggressive in building an end-to-end Agent system. Through the acquisition of ChipStack, it quickly launched the ChipStack AI Super Agent, aiming to improve front-end design productivity by 10 times. Cadence's biggest innovation is the Mental Model, which records design intentions and contexts through structured knowledge representation to reduce the risk of large model hallucinations.

Cadence divides the AI design process into three layers: the top layer is Agentic AI, the middle layer is ground truth tools, and the bottom layer is computing and data. This architecture determines that Cadence's AI tools are not isolated products. Tools such as ChipStack, ViraStack and InnoStack on the one hand help customers automate part of the manual process, and on the other hand drive the usage of basic tools such as Xcelium and Jasper. There will be a superimposed relationship between the new TAM brought by AI and the consumption of basic EDA.

At present, Cadence has been recognized by customers such as NVIDIA, Qualcomm and Broadcom. However, its Agent coverage is still mainly concentrated in design and verification links, and processes such as manufacturing preparation, testing and yield optimization have not yet been covered by Agents.

Siemens EDA

Finally, Siemens EDA put forward a completely different point of view: AI autonomy is not the ultimate goal, and "trustworthy autonomy" is. The core logic of its Fuse EDA AI Agent system lies in "self-verification", that is, during operation, the Agent will not blindly trust the output of the large model, but continuously cross-verify its decisions through deterministic, physics-based traditional EDA signoff engines.

In practical applications, Solido Layout Analyzer helped STMicroelectronics (ST)'s non-volatile memory team shorten debugging time by several weeks. At the same time, by combining with Intelligence Center X, Siemens expanded the Agent's scheduling capability from pure EDA design to manufacturing and supply chain management, showing a unique system-level span. This practice of using physical engines to "endorse" AI decisions greatly alleviates the concerns of hardware engineers about AI "hallucinations".

Siemens EDA is the most open, betting on cross-tool collaboration, and the core advantage of its launched Fuse EDA AI Agent is openness.

Fuse adopts the MCP protocol, which can connect different EDA tools to realize cross-vendor toolchain collaboration. This is attractive for chip companies that use Synopsys, Cadence and Siemens tools at the same time.

Siemens EDA proposed a three-stage evolution of AI Agents:

Phase 1: Task-specific Agents, such as log analysis and routing assistance;

Phase 2: Autonomous Agents that can complete part of the inspection and optimization;

Phase 3: Collective intelligence, where one engineer manages a large number of Agents for collaborative design.

At present, Siemens EDA is still in the transition from the first phase to the second phase.

The Three Giants Are All Inseparable From NVIDIA

It is worth noting that the solutions of the three giants all rely on NVIDIA's support. NVIDIA not only provides the inference layer (Nemotron 3 Ultra), governance layer (OpenShell) and solver (CUDA-X), but also directly cuts into the EDA verification server cluster (Farm), which has extremely high throughput and used to be highly dependent on traditional CPUs, through its self-developed Vera CPU.

It is more noteworthy that chip manufacturers are now also extremely eager to use AI to improve their production capacity. In the past, the chip industry was extremely conservative about new tools, but now, NVIDIA and AMD, the two giants facing the most severe design capacity bottlenecks, are deeply participating as core customers and forcing the R&D process of EDA Agents.

In short, from all the signals released at DAC, Agentic EDA has moved from conceptual exploration to the stage of industrial competition.

Startups Are Exploring Different Routes

At DAC 2026, not only the three major vendors, but also startups are exploring different routes for AI EDA:

The first is the AI agent orchestration platform, which automatically executes the design process by scheduling existing EDA tools. For example, Agentrys hopes to build an agent platform that connects different EDA tools and enterprise scripts.

The second is the domain-specific large model fine-tuning route, which uses chip design data to train dedicated models. The Renoir model launched by ChipAgents is fine-tuned based on an open-source large model, aiming to form advantages in cost and private deployment.

The third is the self-developed vertical foundation model route, which attempts to build a "chip design brain" that truly understands circuit logic and physical constraints. Cognichip is exploring this direction, hoping to break through the limitations of general large models in the physical design field.

Domestic Vendors Are Also Catching Up

In recent years, many domestic EDA vendors have emerged, and these vendors have a very positive attitude towards AI EDA.

At the DAC 2026 conference, Xpeedic jointly with Lenovo released the latest achievements of EDA Agent, becoming the only landing case of domestic EDA enterprises at this conference. Xpeedic's attitude towards AI EDA is similar to that of Synopsys, and it also proposed an L0 to L5 AI EDA evolution route:

In the L0~L2 stage, improve the efficiency of simulation, modeling and design through machine learning, generative AI and knowledge assistants;

In the L3 stage, introduce agent EDA, with the main Agent responsible for task decomposition, process orchestration and state management;

In the L4 stage, realize multi-agent collaboration to support Chiplet, system-level design and multiphysics optimization;

In the L5 stage, explore the design closed loop of autonomous optimization, self-calibration and self-evolution.

Xpeedic emphasizes that AI in EDA should not simply pursue high autonomy, but need to build a verifiable and traceable engineering system. To this end, Xpeedic has built a three-layer product system of "XAI+XAI.Head+XEvo". Xpeedic believes that the core competitiveness of AI EDA in the future is not to replace engineers or complete as many single-point tasks as possible, but to integrate AI into the complex design process in a controllable and trustworthy way.

EpicSys is promoting AI Agents into the design and verification process. In July this year, EpicSys released the Agentic EDA base XEPIC Intelligent System (X-IS), launched the intelligent verification system X-IVS, intelligent design system X-IDS and the new generation high-speed simulation solution GalaxSim Turbo 3.0 Plus, officially implementing the EDA 2.0 concept. EpicSys stated that the core of Agentic EDA is not simply to improve AI generation capabilities, but to convert AI outputs into verifiable, traceable and signoff-able engineering results through "evidence closed loop". EpicSys also cooperated with Wumen Xinqiong to launch the EDA AI all-in-one machine, promoting the coordinated development of domestic computing power and domestic EDA.

UniVista Software released the second-generation digital design AI intelligent platform - the agent UniVista Design Agent (UDA) 2.0 in March this year. After this upgrade, the UDA platform has officially evolved from an intelligent auxiliary tool to a true Agentic AI agent. UDA 2.0 is the first leading agent EDA tool in China based on a fully self-developed EDA architecture. It can independently complete the whole process of RTL design, verification, error correction and optimization after receiving design requirements and guidance from engineers, marking that the era of domestic EDA autonomous agents has fully begun.

SiliconCore Technology also bets on AI Agents. It believes that the value of AI EDA is mainly reflected in three aspects: first, opening up multi-tool automated collaboration to reduce manual scripts and repetitive operations; second, performing global intelligent optimization in the complex parameter space; third, lowering the threshold of advanced packaging design through AI Agents to help enterprises lacking 3D IC experience quickly use relevant tools. Based on this direction, SiliconCore Technology launched the AI Agent platform Chips Z, and combined it with the self-developed 3Sheng 3D IC EDA platform to build a collaborative system of "AI Agent + EDA toolchain".