Optical chips, hidden undercurrents are surging.
Against the backdrop of the continuous expansion of AI large models and the exponential surge in bandwidth demand of data centers, the industry has put forward three rigid requirements for photonic chips: high-speed transmission, low power consumption, and flexible scheduling. The competition logic of the track has changed. The industry competition no longer only focuses on the upper-layer architecture design of chips, and the physical properties of underlying optical materials have become the core key to determining the upgrading of next-generation optical communication and the breakthrough of photonic computing power. The current mainstream photonic materials have their own trade-offs, and there is no all-round material that can adapt to all scenarios.
Among numerous materials, silicon photonic (SiPh) chips are the most commercially mature photonic materials that have achieved mass production at present. They rely on the thermo-optic effect to complete signal regulation, with relatively slow modulation response speed and high static power consumption during operation. Indium Phosphide (InP), as the core material of traditional active photonic chips, has outstanding modulation rate performance, but its epitaxial preparation process is complex, the size of the adapted wafer is small, and it is difficult to reduce the cost of large-scale mass production. Thin Film Lithium Niobate (TFLN) has the modulation advantages of high speed and low optical loss, but once applied to the photonic memory-computing scenario, its shortcomings will be very prominent: the device must be continuously powered on to maintain normal operation, and the operation weights stored inside will be lost directly after power off. Lead Zirconate Titanate (PZT) and Barium Titanate (BTO), as new ferroelectric electro-optic materials, are developing rapidly. These two materials have the dual characteristics of high-speed electro-optic modulation and non-volatile memory, and have now become the frontier direction of key exploration in the global photonic computing field.
To sort out this material-centered industry competition, we must first distinguish the two core application fields of photonic chips, which have completely different core indicator requirements for materials. One is the optical transmission track dominated by data center interconnection and coherent optical communication, whose material selection core focuses on high-speed modulation, low power consumption and mass production capacity. The other is oriented to AI integrated memory and computing and general photonic computing, which adds additional rigid requirements for materials, requiring non-volatile characteristics to store operation weights for a long time. The value that the same material can exert in the two tracks is completely different, which is the fundamental reason why we need to consider different application scenarios when analyzing material routes.
Echelon Layout of Photonic Chip Materials
Combining the technical maturity, industrialization progress and adaptability to different scenarios, the current photonic chip materials on the market can be divided into three clear echelons.
The first echelon includes two types of commercially mature traditional materials: silicon photonics and InP. Silicon photonics can reuse the mature CMOS manufacturing process, with high chip integration and controllable production cost, and has long occupied the market from medium-low speed to high-speed optical interconnection. InP leads the industry in active light emission and high-speed modulation performance, and has always occupied the core market of long-distance transmission and high-end coherent optical communication. Switching to the optical computing scenario, silicon photonics, relying on a complete and mature upstream and downstream industrial ecosystem, is the core foundation for the commercial implementation of photonic computing at present. Limited by complex processes and high manufacturing costs, InP cannot be used as a computing power carrier alone, and is only used to make a small number of external laser sources to integrate with other materials, and has never formed large-scale computing power products.
The second echelon is TFLN for high-end and high-performance scenarios. In the field of optical transmission, TFLN is the optimal performance solution for current 1.6T and 3.2T ultra-high-speed optical modules and high-end Co-Packaged Optics (CPO), with fast modulation speed, low driving voltage and small optical loss, and is the core material for the iterative upgrading of high-end optical communication. In the field of optical computing, the team of Marko Lončar from Harvard University developed the world's first TFLN coherent photonic computing chip with heterogeneously integrated light source/detector, and completed wafer-level preparation using the HyperLight production line, reaching the prototype test stage of pilot scale, which verified the high-speed parallel computing capability of TFLN.
The third echelon is the cutting-edge ferroelectric materials for next-generation computing power, mainly PZT and BTO. The R&D focus of both is concentrated on the integrated photonic memory and computing scenario, while maintaining excellent electro-optic modulation capability. Relying on the native ferroelectric non-volatile property of the material, the operation weights can still be retained after power off, which makes up for the shortcomings of the three materials of silicon photonics, InP and TFLN in terms of computing power and power consumption from the material level.
Advantages and Disadvantages Game in Photonic Computing Scenarios
Qualitative classification of echelons purely based on the industrialization stage is not enough to illustrate the performance gaps between various materials. Starting from the application scenario of integrated photonic memory and computing, focusing on the core needs of this track, we can horizontally compare the respective advantages and technical trade-offs of the five materials from six dimensions: non-volatile memory characteristics, electro-optic modulation efficiency, operating power consumption, modulation response speed, silicon-based process compatibility, and mass production process difficulty.
Non-volatile memory capability is the core watershed that distinguishes the application fields of various materials. Silicon photonics, InP and TFLN do not have the ability to independently retain operation weights. During operation, they must be equipped with external memory chips or continuously powered on to refresh the operation state to maintain a stable computing process. Relying on the ferroelectric polarization property, PZT and BTO can store operation weights for a long time, which naturally adapts to the integrated memory and computing architecture, and is also the most core competitiveness of ferroelectric materials different from other material routes.
In terms of electro-optic modulation efficiency, silicon photonics relies on thermo-optic or carrier to complete modulation, and the overall modulation efficiency performance is mediocre. InP adopts the electro-absorption modulation method, which has outstanding high-speed performance, but will produce insurmountable heat dissipation pressure. Relying on the Pockels electro-optic effect, TFLN can achieve a modulation bandwidth exceeding 110GHz, with the working driving voltage lower than 2V, which can be directly connected to the mature CMOS driving circuit. PZT also works based on the Pockels effect, with an electro-optic coefficient of about 100pm/V, more than three times that of TFLN, and can achieve stronger modulation effect under the same optical path length. The theoretical upper limit of BTO's electro-optic performance is higher, but the relevant engineering verification work has not been implemented yet.
In terms of operating power consumption, the no-load power consumption of the silicon photonic thermo-optic modulation scheme is maintained in the milliwatt range. With the continuous expansion of chip integration scale, the thermal crosstalk problem between optical paths will continue to intensify, and InP electro-absorption modulation will also continuously generate thermal loss during operation. TFLN devices need to be powered on for a long time to work stably, and the static power consumption cannot be reduced to zero. Relying on the ferroelectric non-volatile property, the static power consumption of PZT chips is infinitely close to zero. The measured data of the relevant team of Shanghai Jiao Tong University shows that the energy consumption of single signal tuning of the material is only 0.05 nanowatts, which is eight orders of magnitude lower than that of the silicon photonic thermo-optic scheme. The theoretical power consumption level of BTO is extremely low, but there is no wafer-level measured data to support it for the time being.
In terms of modulation response speed, the bandwidth of silicon photonic modulator is about 60-70GHz, which has approached the physical performance ceiling of silicon-based materials. InP electro-absorption modulator (EML) has high intrinsic electron mobility, with a theoretical bandwidth of up to 100-110GHz, and the upper limit of hardware speed is higher than that of silicon photonics, but the heat dissipation problem will limit the exertion of actual performance. TFLN has no carrier dispersion and extremely low thermal loss. The 3dB bandwidth of current commercial modulators stably exceeds 110GHz, and it has irreplaceable bandwidth advantages in 1.6T, 3.2T and even next-generation 6.4T ultra-high-speed data center optical modules and CPO. The performance of ferroelectric materials is also excellent. In July 2026, Shanghai Jiao Tong University released the results that all four PZT electro-optic modulators achieved electro-optic bandwidth greater than 100GHz, which is also the highest performance index of PZT devices in the public reports at present. The bulk electro-optic coefficient of BTO is 253pm/V, which is much higher than TFLN and PZT. Theoretically, it can support ultra-high-speed modulation, but the relevant performance verification work is still in progress.
From the perspective of silicon-based process integration compatibility, silicon photonics is naturally compatible with CMOS manufacturing processes, with the lowest integration difficulty. InP requires multi-layer epitaxial stacking, and mostly adopts heterogeneous hybrid integration scheme. The production of TFLN is more complex, requiring special processes such as ion cutting and high-precision wafer bonding, and the material itself cannot emit light, so it must be used with InP external laser source. PZT is relatively simple, and thin film preparation can be completed only by liquid phase deposition and magnetron sputtering, which is compatible with the existing CMOS mass production lines. The most difficult one is BTO, whose ultra-thin film is difficult to achieve large-area uniform growth, and the performance consistency inside the whole wafer is difficult to control, which is a prominent problem in the process of industrialization.
In terms of mass production process maturity, the complete process system of silicon photonics is perfect. Global foundries including GlobalFoundries, TSMC, UMC, Tower Semiconductor and many domestic enterprises have opened standardized silicon photonic PDK and MPW tape-out services, and 8-inch and 12-inch mass production lines are mature. The mainstream mass-produced InP substrates in the world are mainly 4 inches, with low 6-inch yield and 3-5 years of capacity expansion cycle. At the same time, the unit price of MOCVD epitaxial equipment required exceeds 10 million yuan, and the manufacturing cost of a single wafer is more than ten times that of silicon. TFLN has attracted many foundries to make layouts, but its exclusive process flow is special, and the overall global production capacity is still in the climbing stage. PZT has completed the mass preparation of 4-inch low-cost wafers, and the world's first dedicated process development kit for photonic integration has been launched. The large-area component uniformity of BTO thin films and oxygen vacancy defects are difficult to control, and the performance of the whole wafer fluctuates greatly. There is no mature mass production scheme for 4-inch and above wafers so far, and only 4-inch BTO epitaxial samples have been produced in the laboratory of Tsinghua University.
Comprehensive performance from all dimensions shows that the trade-offs made by different material routes are essentially a two-way balance between high-speed transmission performance and computing power energy efficiency, as well as between industrial implementation maturity and cutting-edge technology advancement.
Global Industrial Layout of Photonic Chip Materials
From the perspective of industrial implementation, the significant differentiation of various photonic materials in performance indicators, manufacturing difficulty and mass production cost directly determines the technology selection and commercialization promotion rhythm of enterprises in different regions around the world. The choices of various enterprises on material routes are different. Overseas manufacturers rely on the mature semiconductor foundry ecosystem to prioritize the layout of silicon photonics and TFLN standardized platforms, while the domestic industrial chain simultaneously promotes the parallel breakthrough of multiple routes, forming differentiated competitive advantages in silicon photonic commercial delivery, full-chain independent supporting of TFLN, and cutting-edge PZT photonic computing fields.
Silicon Photonics Route: Stable Commercial Base
Silicon photonics is the photonic material solution with the most complete industrialization and the highest market share at present, and it is also the core carrier for the implementation of AI computing power interconnection and CPO technology. According to the forecast of TrendForce, the penetration rate of CPO in optical communication modules of AI data centers will rise steadily, and it is expected to reach about 35% around 2030.
In the overseas market, a number of leading enterprises including Intel, Cisco, Ayar Labs and Lightmatter continue to deeply cultivate the silicon photonic technology platform. Lightmatter focuses on silicon photonic computing acceleration chips, and Ayar Labs focuses on data center optical interconnection solutions. Both are global benchmark manufacturers in the track. The maturity of the silicon photonic industry chain has led to particularly fierce competition in the wafer foundry link. In 2022, GlobalFoundries launched GF Fotonix, the industry's first platform integrating 300mm photonic process and radio frequency CMOS. In 2025, it completed the acquisition of AMF, a silicon photonics foundry in Singapore, and became the world's largest pure silicon photonics foundry in terms of revenue scale, directly squeezing the living space of Tower and UMC.
Similarly, the domestic silicon photonic industry chain has formed a complete closed loop.
TFLN Route: Accelerating the Industrialization of Optical Transmission
Facing the scenarios of 1.6T and 3.2T ultra-high-speed optical interconnection and high-end coherent communication, TFLN, with its unique properties of ultra-high bandwidth and low driving voltage, has become the core material for the iteration of high-end optical modules, and the commercialization process of the track is continuing to accelerate. Although the current overall market size of TFLN is small, the global market size of thin film lithium niobate modulators in 2025 is only about 35 million US dollars, with a market share of less than 5%; but QYResearch predicts that with the mass production of high-speed optical modules in the future, the market size will reach 740 million US dollars by 2032, with a CAGR of 55.4% from 2026 to 2032.
Internationally, HyperLight is a benchmark start-up in the TFLN track incubated by the Harvard laboratory. In March 2026, it reached in-depth tripartite cooperation with UMC and its subsidiary UMC Opto, to implement the 6-inch and 8-inch wafer-level TFLN chiplet mass production platform, whose products cover multiple scenarios including data center pluggable optical modules, long-distance coherent communication, and co-packaged optics. This cooperation is also regarded by the industry as a landmark event for TFLN to officially enter the stage of wafer foundry large-scale mass production. In the direction of photonic computing, many overseas universities have built photonic computing prototype samples based on TFLN, but no enterprises have planned the implementation of commercial computing chips.
Turning back to China, local enterprises have built a complete and independent TFLN industrial chain, covering all links of upstream thin film wafers, midstream high-speed modulator chips, and downstream device packaging, with the core market targeting high-speed coherent optical modules and high-end CPO.
Ferroelectric Material Route: Excellent Performance but Premature for Commercialization
In the field of PZT and BTO materials, large-scale commercialization has not been realized in the domestic and overseas markets, and the global market share of photonic computing chips is less than 1%. The overseas research layout is dominated by basic exploration in university laboratories. Many universities in Europe and the United States carry out research on PZT and BTO thin film photonic devices, focusing on thin film growth process and electro-optic basic performance testing. The whole research is still in the academic research stage, and there is a long way to go before industrial implementation.
However, in China, the PZT route has formed a global leading advantage. In November 2024, the team of Li Ming from the Institute of Semiconductors, Chinese Academy of Sciences, united with the team of Qiu Feng from the Hangzhou Institute for Advanced Study, University of Chinese Academy of Sciences, adopted the composite process of liquid phase deposition + magnetron sputtering to realize the low-cost mass preparation of 4-inch PZT thin film wafers, and developed the world's first publicly available PZT photonic integration process development kit library. In July 2026, the team of Zhang Yong and Su Yikai from the School of Integrated Circuits, Shanghai Jiao Tong University, jointly with the team of Tian Yonghui from Lanzhou University and the team of Qiu Feng from the Hangzhou Institute for Advanced Study, UCAS, developed a thin-film PZT electro-optic modulator with a bandwidth exceeding 100GHz. Relying on the ferroelectric non-volatile property of the material, a 16-channel parallel optical path architecture is monolithically integrated on a 4-inch PZT silicon nitride composite wafer, equipped with 20 sets of topological modulation units, to create a reconfigurable photonic computing chip with a computing power density of 266TOPS/mm², and the energy consumption of single signal tuning is only 0.05 nanowatts. These two milestone achievements prove that PZT technology has been upgraded from the R&D of a single modulation device to a complete and operable photonic computing array, and domestic teams have opened up the full-chain independent technology from thin film preparation to chip design.
As another ferroelectric material, the overall R&D progress of the BTO route around the world is relatively lagging behind. Research institutions at home and abroad can only complete the trial production of small laboratory devices, there is no mature wafer-level mass production scheme, and it is difficult to realize industrial implementation in the short term.
Conclusion
Looking at this competition of underlying materials for photonic chips, various technical routes are not zero-sum games that replace each other, and heterogeneous hybrid integration will become the mainstream direction of the long-term evolution of the industry. From the development of the industry, we can see that the demand for the integration of computing power and communication is continuously iterating,