In the AI-native era, what exactly are autonomous vehicles competing on?

With the popularization of AI-native systems, autonomous driving is becoming a comprehensive competition for computing power, software, data, and semiconductors.

The development of Advanced Driver Assistance Systems (ADAS) and Autonomous Driving (AD) in the automotive industry is entering a new stage, and generative AI is becoming the core feature of this stage.

Today, generative AI is accelerating the industry's transformation towards an AI-native end-to-end (E2E) architecture, which can directly learn driving behaviors from massive datasets. Compared with traditional systems, end-to-end systems can adapt to unfamiliar environments more efficiently, handle more complex driving scenarios, and the speed of capability iteration significantly accelerates as the data processing volume increases.

These technological changes are rewriting the business logic of ADAS and autonomous driving. The competitive advantage in the industry is no longer limited to building vehicles with better performance but is shifting towards enterprises with AI models, semiconductors, cloud infrastructure, large-scale data collection, and the ability to efficiently verify software and hardware integrated systems. This transformation is taking place against the backdrop of increasing consumer attention and continuous growth in investment in the autonomous driving field.

A clear trend shows that autonomous driving is not only an automotive engineering issue but is increasingly becoming an AI infrastructure challenge.

Consumer Attitudes and Market Development Momentum

Will most cars achieve full autonomous driving by 2035? The latest McKinsey survey shows that most Chinese consumers hold a positive attitude, while about a quarter of Western consumers agree with this expectation. In fact, ADAS and autonomous driving are rapidly moving towards popularization, and the influence of ADAS functions on car purchase decisions continues to increase, especially in the high-end vehicle market.

Consumers are also willing to take non-owned autonomous vehicles, as evidenced by the rapidly growing autonomous taxi (Robotaxi) market. Globally, consumers' acceptance of autonomous mobility services continues to rise, with over 60% of surveyed consumers saying they would consider using Robotaxis, and about half of the respondents expecting a decrease in travel costs in the next few years.

However, consumers' expectations for the technology implementation progress are generally higher than those of industry experts. Most surveyed experts in the field of autonomous driving believe that L2+ systems will dominate the mass market before 2035, and L3 and higher-level systems will probably still be limited to specific scenarios and regions during the same period.

The continuous iteration of L2+ systems and the steady progress of L4 autonomous driving will drive the continuous growth of the global ADAS software and electronics market. It is estimated that the market will have a compound annual growth rate of about 16%, and the market size will reach about $160 billion by 2035, with software and domain controllers (DCUs) accounting for the largest market share.

Although the industry has strong growth momentum, the large-scale implementation of autonomous driving still faces high costs and technical challenges. Software development, safety verification, and large-scale data collection are the main sources of costs. The transformation towards an end-to-end AI architecture also further increases the requirements for computing power infrastructure, simulation capabilities, and high-performance semiconductors. In November 2025, an informal survey of more than 40 industry executives showed that the three core challenges for ADAS implementation are: safety assurance (23%), high computing power requirements for in-vehicle inference (14%), and regulatory and legal uncertainties (14%).

From Rule-Driven to End-to-End Systems

In the past decade or so, the development of ADAS and autonomous driving has mainly relied on rule-driven software architectures - engineers write thousands of explicit instructions to define the response logic of vehicles in specific scenarios. This architecture supports most of today's safety and convenience functions (from automatic emergency braking to adaptive cruise control) and lays the foundation for higher-level autonomous driving. Currently, the industry is undergoing a profound architectural transformation.

Two major technological and strategic forces are accelerating the popularization of end-to-end architectures:

First, generative AI has significantly accelerated the iteration speed of ADAS and autonomous driving technologies. Traditional systems rely on explicit programming rules or only apply machine learning in local scenarios (such as traffic sign detection); while end-to-end architectures can directly learn driving behaviors from large-scale datasets, have stronger generalization ability in unfamiliar scenarios, and the driving performance is closer to human natural driving habits.

Second, the technological breakthroughs in L4-level autonomous driving have promoted cross-domain collaboration in the ecosystem. The cooperation between semiconductor companies, vehicle manufacturers, and mobility operators has become increasingly normalized. Most implementation projects adopt a phased model: first, accumulate real road test data through data collection fleets, then verify the system performance in a supervised mode in limited scenarios, and finally achieve fully autonomous operation. This kind of collaboration is reshaping the industry's competitive landscape and accelerating technological iteration.

Three Types of Technological Routes for ADAS and Autonomous Driving

Currently, three mainstream architectures have emerged in the ADAS field, generally combining multi-modal vision models with reinforcement learning/imitation learning technologies: some solutions use a single model to synchronously process perception, planning, and control tasks, while another type of solution uses a multi-model joint training mode.

The following two types of architectures are derived from the traditional rule systems of the first-generation autonomous driving technology:

The first type is traditional ADAS (Autonomous Driving 1.0): Based on a modular pipeline architecture, perception, planning, and control are split into independent software layers. Most of the code is manually written, and specific driving scenarios are covered through explicit "if-then" rules (such as "trigger braking when a pedestrian is detected within 10 meters"), and AI technologies such as machine learning are only applied within the layers to a limited extent.

The second type is a hybrid architecture, which combines end-to-end learning with rule-based safety mechanisms. Usually, AI technologies such as "Vision-Language-Action (VLA)" models are used to complete core driving tasks, and additional rules are used to monitor the output results and constrain the safety boundaries.

The end-to-end architecture is regarded as the second-generation autonomous driving technology (Autonomous Driving 2.0). It is based on the Transformer model and trained on massive datasets generated by the Internet and in-vehicle devices to learn complex driving behaviors and achieve generalization and adaptation in various scenarios.

Enterprises deploying end-to-end autonomous driving have not reached a unified design consensus and are mainly divided into two technological routes:

The first is the modular end-to-end design. It combines the performance advantages of AI learning with the interpretability of modular engineering. Different pre-trained models are used to undertake functions such as perception and planning, but the models are jointly trained under an end-to-end optimization framework. The advantage of this architecture is that the intermediate outputs are observable and can be independently verified, which reduces the difficulty of debugging and safety analysis. Developers can also apply closed-loop simulation technology to the planning layer to improve efficiency. The shortcoming is that there is information loss at the module interfaces, and the generalization ability in complex real scenarios is slightly weaker.

The second is the monolithic architecture design. A single model is used to synchronously complete perception and planning tasks, and some solutions even cover vehicle control. Supporters believe that eliminating module interfaces can reduce information loss and achieve stronger generalization ability, but the cost is a significant increase in technical complexity. Monolithic systems require massive training data, huge computing resources, and a highly mature simulation environment, and the model decision-making process is usually not directly observable, which significantly increases the verification difficulty.

The industry has gradually reached a consensus that in a highly variable driving environment, the end-to-end architecture performs better than traditional systems and can handle scenarios not explicitly defined in advance by engineers. This ability is particularly important in urban environments with dynamic road conditions and ambiguous scenarios.

However, behind the advantages, there are also core problems: insufficient interpretability. Different from modular rule systems, end-to-end models often present "black box" characteristics. Engineers can observe the system behavior but cannot fully explain the decision-making logic, which brings obstacles to safety verification, problem troubleshooting, and regulatory approval.

These limitations also affect the large-scale implementation rhythm of different levels of autonomous driving. Most industry participants believe that the large-scale implementation speed of L2+ systems will be faster than that of fully autonomous driving. In L2+ scenarios, human drivers still assume the monitoring responsibility, which reduces the pressure to prove the complete safety of the system. To achieve large-scale implementation of L3 and L4 levels relying on pure end-to-end algorithms, multi-domain technological breakthroughs are required: AI models with higher data efficiency, large-scale simulation capabilities covering extreme long-tail scenarios, and broader regulatory recognition. The hybrid solution that adds a safety monitoring layer on the basis of end-to-end algorithms is expected to accelerate the implementation and application of end-to-end models in L3 and L4 vehicles.

Meanwhile, the transformation towards an AI-native end-to-end architecture is triggering an explosive growth in the industry's computing power demand, and semiconductors and in-vehicle computing platforms are becoming the core competitive barriers.

A New Era of In-Vehicle Hardware and System Requirements

The automotive semiconductor market is evolving rapidly. The core trends include the widespread application of GPUs and NPUs in AI workloads, the continuous increase in the computing power requirements of in-vehicle entertainment and ADAS applications, and the implementation of emerging architectures such as integrated system-on-chip (SoC) and chiplets. These architectures can efficiently run multiple types of applications with different safety levels (such as in-vehicle entertainment and ADAS) on a single chip.

It is estimated that the market size of ADAS/autonomous driving processing chips will grow from about $5.6 billion in 2025 to over $46 billion in 2035, with a compound annual growth rate of about 24%, significantly higher than that of the overall automotive semiconductor market. The value share of this category in the automotive semiconductor market will increase from less than 6% in 2025 to 22% in 2035. All regional markets around the world will achieve growth, and the Greater China region is expected to become the largest market globally in 2035.

This rapid growth reflects the deep changes in the design and deployment of autonomous driving systems. As the industry transforms from rule-driven ADAS to end-to-end AI systems, the in-vehicle computing power demand has increased sharply. Future systems need to process massive multi-modal sensor data streams in real-time and continuously run large models under strict latency and safety constraints. The simple peak computing power performance is no longer the only core indicator, and NPUs, memory bandwidth, and advanced packaging technologies are becoming decisive strategic factors.

Three structural trends in NPUs and memory bandwidth are driving the upgrade of next-generation in-vehicle computing power:

First, with the improvement of the autonomous driving level and the widespread application of sensors such as high-resolution cameras, radars, and lidars, the computing power demand has increased significantly. Higher-level autonomous driving requires the system to process more data, interpret more complex environments, and run more precise planning algorithms within milliseconds.

Second, the popularization of end-to-end architectures has fundamentally changed the internal computing power composition of in-vehicle SoCs. In the early ADAS architectures, GPUs were usually the core acceleration units for perception workloads; while in end-to-end architectures, NPUs optimized for AI inference have become the main computing power. CPUs continue to undertake safety-critical functions and overall system scheduling, especially in systems that meet the Automotive Safety Integrity Level (ASIL) compliance requirements; GPUs and digital signal processors (DSPs) have shifted to auxiliary roles, responsible for pre- and post-processing, visualization rendering, and compatibility with the AI training ecosystem.

Third, the industry is evolving towards a centralized computing platform, which can simultaneously carry functions such as ADAS, in-vehicle entertainment, and body control. This architecture reduces the wiring complexity, improves the software upgradeability, simplifies the OTA upgrade process, and creates space for the flexible deployment of AI functions throughout the vehicle's lifecycle. However, it also brings technical challenges: Workloads with different critical levels, latency requirements, reliability, and safety standards are integrated into the same platform, so the importance of scalable architectures and advanced interconnection technologies is becoming increasingly prominent.

The INT8 computing power of current mainstream ADAS SoCs is usually between 100 and 400 TOPS (trillions of operations per second). These platforms have integrated heterogeneous computing units such as CPUs, GPUs, NPUs, and DSPs. However, as the requirements for AI workloads increase, the computing power allocation of the architecture is changing: New-generation chips will allocate more silicon area to NPUs rather than GPUs, corresponding to the trend of the continuous increase in the proportion of AI inference in end-to-end systems; CPUs still handle safety-critical functions, system scheduling, and redundant backups.

However, the raw computing power performance is no longer the primary constraint for next-generation ADAS systems. As the scale of AI models running in end-to-end architectures expands and the sensor data streams become increasingly rich, the industry faces new challenges: How to achieve real-time and efficient transmission of massive data within the system.

One of the most significant changes in the end-to-end ADAS architecture is that the system has shifted from being "computing power-limited" to being "memory-limited" - this is due to the pressure brought by the increase in the number of parameters, high-resolution sensor data streams, and large intermediate activation layers. Memory bandwidth (in GB/s) is increasingly becoming a decisive factor in system performance, and high-bandwidth LPDDR memory and larger on-chip SRAM caches have become core design indicators. At the same time, vehicles also need larger non-volatile storage space to store larger model weights and support high-frequency software updates.

These requirements have a profound impact on cost, heat dissipation design, and packaging strategies. High-bandwidth memory and advanced packaging technologies can alleviate bandwidth constraints but also increase costs and system complexity. Today, most industry participants believe that the memory architecture, rather than the peak computing power, is the core bottleneck for the large-scale implementation of end-to-end autonomous driving.

The importance of memory also extends beyond the vehicle. The surge in AI demand is causing a shortage of storage chip supply. According to data from research institution Omdia, cloud providers are accelerating the procurement of storage chips, and the server field accounted for over 50% of the DRAM demand in 2025; from 2023 to 2025, the compound annual growth rate of global DRAM sales was about 70%.

In addition to throughput, end-to-end systems have another core requirement: deterministic latency. ADAS and autonomous driving rely on real-time control loops, and sensor input, planning decisions, and vehicle control output must be completed within a strictly controllable and highly predictable time window. Fluctuations in execution time will directly affect safety.

This requirement increases the importance of on-chip interconnection and low-latency communication networks, and the latency between chips is a major challenge for end-to-end control loops. Distributed architectures have flexibility and scalability but bring synchronization delays and unpredictable behaviors, making it difficult to verify in safety-critical systems.

Therefore, deterministic execution and controllable latency are becoming the core design constraints for next-generation end-to-end autonomous driving platforms. In most scenarios, a highly integrated computing architecture has more advantages than a decentralized design, as it can minimize communication overhead and improve timing predictability.

Why is Autonomous Driving Becoming an AI Infrastructure Challenge?

In addition to the vehicle side, AI-native end-to-end systems also require huge data center computing power support. The modular architecture of early ADAS split perception, positioning, prediction, and planning into independent software stacks, while the end-to-end architecture uses a unified neural network to directly map raw sensor inputs to driving decisions and vehicle control instructions.

As the computing power demand in each stage of the development lifecycle increases, the business logic of ADAS and autonomous driving is changing from the traditional automotive engineering model to the ultra-large-scale AI platform model.

The computing power demand of AI-native end-to-end systems is mainly driven by three structural forces:

First, the model complexity and memory intensity have increased. End-to-end systems rely on larger and more sophisticated AI models. Transformer architectures, multi-modal foundation models, and emerging VLA systems need to process massive high-dimensional sensor data in real-time and simultaneously complete environment interpretation, path planning, and vehicle control. High-resolution camera inputs, 3D occupancy networks, and neural networks with billions of parameters require a huge GPU cluster for training and high-computing-power in-vehicle central computers, ultra-high memory bandwidth, and advanced tensor parallel architectures for deployment.

Second, the scale of training data has increased significantly. End-to-end models require developers to collect, store, annot