Nvidia Enters the Scene. Behind the $400 Million in Financing, RISC-V Ushered in Spring

On April 9, 2026, SiFive announced the completion of a $400 million oversubscribed Series G financing, and NVIDIA appeared on the list of investors. What's more notable is not the financing amount, but the destination of this money: to accelerate the development of next-generation data center solutions to meet the needs of Agentic AI workloads.

SiFive's financing in this round can be regarded as a landmark event in the development process of RISC-V.

For RISC-V, this scene is not sudden. In the past decade or more, the industry has repeatedly discussed its openness, flexibility, and strategic value. RISC-V has long taken the position of the third architecture besides x86 and Arm. But until today, as AI has pushed data centers back to the center of computing power competition, the market has begun to seriously ask: Who should define the next-generation CPU?

01 It Has Become the New Third Pole

This wave of "popularity" of RISC-V didn't happen overnight. More precisely, it didn't suddenly become popular. Instead, since its inception at the Berkeley Laboratory in 2010 and entering the industrial vision around 2015, it has taken more than a decade to gradually enter the mainstream agenda of the global semiconductor industry.

In 2015, the RISC-V Foundation (later renamed RISC-V International) was established, marking its transition from a university project to a global open standard. By 2024, RISC-V International had covered 70 countries and had more than 4,200 members. The cumulative number of RISC-V cores deployed in the market exceeded 13 billion. In 2025, RISC-V International defined this year as a landmark year: RVA23 began to become the common baseline for application processors, Ubuntu also set RVA23 as the new support benchmark, and NVIDIA announced the promotion of CUDA support for RISC-V.

The bets of international giants on RISC-V have become more and more concrete in the past two years. In October 2025, Meta spent $2 billion to acquire RISC-V manufacturer Rivos to accelerate the advancement of Meta's self-developed chip roadmap. More than 100,000 second-generation AI chips MTIA 2i based on the RISC-V architecture have been deployed, supporting the recommendation model inference tasks of 16 core data centers around the world. In December 2025, Qualcomm acquired Ventana, clearly strengthening its high-performance RISC-V CPU capabilities. In March this year, Samsung for the first time put its self-developed RISC-V controller into the BM9K1 consumer-grade SSD. Coupled with NVIDIA's investment in SiFive and directing the funds specifically towards high-performance RISC-V data center CPUs and AI IP solutions, what RISC-V has been promoted in recent years is not a single scenario, but extends from automotive electronics and consumer-grade storage to server CPUs and data centers.

Meanwhile, in China, the power of RISC-V is also gathering. The Xiangshan project of the Beijing Open Source Chip Institute, a RISC-V processor core project, continues to play the role of a lighthouse for high-performance open-source RISC-V technology. Since its launch in 2019, the project has become one of the most concerned open-source hardware projects internationally. At the same time, manufacturers such as ESWIN, GigaDevice, Espressif Systems, and Allwinner Technology have successively launched RISC-V-related products, covering multiple directions such as intelligent computing, MCUs, wireless connections, and application processors. The domestic layout around RISC-V is no longer limited to making cores, MCUs, and conducting research, but has begun to move towards making chips, platforms, systems, and scenarios. The RDI (RISC-V Digital Infrastructure) Alliance, initiated by enterprises such as ESWIN, Financial Street Capital, Neusoft, CloudWalk, and Days Intelligent Chip, is the core force promoting the construction, innovation, and development of the RISC-V ecosystem in various regions.

From a broader industrial perspective, RISC-V International CEO Calista Redmond revealed that from 2021 to 2031, the overall market penetration rate of RISC-V will increase from 2.5% to 33.7%. According to the prediction of SHD Group, by 2031, the shipment volume of products equipped with RISC-V cores will reach 36 billion, with a compound annual growth rate of 31.7%, and the corresponding market scale will exceed $300 billion.

RISC-V has long become the third most concerned route in the global semiconductor industry besides x86 and Arm.

02 Aggressively Targeting Data Centers, Why Did NVIDIA Invest in SiFive Now?

First, look at the use of funds given by SiFive itself - to directly promote SiFive's RISC-V CPU and AI IP solution R & D for the data center field. This statement itself shows that the focus of the AI data center competition is shifting from the peak performance of a single chip to the collaborative efficiency of the entire system.

In traditional data centers, the value of the CPU is mainly reflected in general computing capabilities, software compatibility, and platform stability. After entering the era of large models, the role of the CPU has been re - elevated. The GPU is responsible for large - scale parallel computing, but task scheduling, memory management, I/O scheduling, device virtualization, security isolation, exception handling, and resource coordination between different accelerators still need to be completed by the CPU. As the cluster scale continues to expand, the CPU is no longer just the computing power base, but the control center of the heterogeneous system.

This is exactly the reason why RISC-V has been rediscovered. For ultra - large - scale data centers and AI infrastructure manufacturers, the next - generation CPU does not necessarily need to be a standardized general - purpose processor. More importantly, can it conduct in - depth collaborative design around the target load, interconnection architecture, memory subsystem, and dedicated accelerators? Compared with traditional closed architectures, the flexibility of RISC-V in instruction set extension, micro - architecture tailoring, and IP licensing makes it more suitable for this role. NVIDIA's investment in SiFive is not a financial investment, but a future strategic investment. It invests not in the conceptual popularity of RISC-V, but in the real demand of data centers in the AI era for customizable CPU architectures.

Why now? Because the high - performance route of RISC-V has gradually matured.

In the past, when talking about RISC-V, it was more about MCUs, controllers, and edge computing. In the past two years, high - performance products have gradually come to the forefront. SiFive's P870 - D is directly targeted at data centers, supporting RVA23, using CHI interconnection, scalable to 256 coherent CPU cores, and supporting CXL and chiplet configurations. Andes presented the Cuzco high - performance CPU, with the target scenarios directly covering AI, data centers, networks, and automobiles. Ventana launched the Veyron V2 targeting the server scenario, which began shipping in 2025, and its energy efficiency can be improved by about 30% - 50% compared with the mainstream x86 server platform. In China, Xiangshan's "Kunming Lake" covers data center and intelligent computing scenarios, with a measured performance of 16.5 points/GHz. It is paired with the world's first open - source data center on - chip network "Wenyu River", supporting 256 - core interconnection.

Meanwhile, the platform is also being improved. SiFive's HiFive Premier P550 is defined by its official website as the highest - performance RISC-V development board at present. It uses ESWIN's EIC7700 SoC and integrates a quad - core SiFive P550 on the board. Subsequently, SiFive, ESWIN, and Canonical also provided Ubuntu 24.04 LTS on this board.

At this stage, the problem RISC-V faces is not whether there is a high - performance route, but when these routes will enter a larger - scale productization stage.

03 It's Time to Re - Evaluate RISC-V

In the past, capital regarded RISC-V with a "backup" mentality; now, capital has regarded it as the "main force" for restructuring the computing landscape in the next decade. NVIDIA's investment in SiFive has completely ignited the confidence of the primary market in the high - performance RISC-V track.

Globally, the RISC-V track is experiencing a round of intensive capital infusion. In addition to SiFive's $400 million Series G financing, with its valuation soaring to $3.65 billion, Tenstorrent received more than $693 million in Series D financing; German startup Ubitium also received $3.7 million in seed - round financing, fully betting on RISC-V development. The entry of industrial capital is also star - studded: names like NVIDIA, LG Electronics, and Fidelity appear on the list of investors.

In the domestic market, ESWIN is the most concerned one. ESWIN is a Chinese enterprise in the RISC-V field with CPU customization capabilities, the strongest industrialization capabilities, and the earliest and best ecological layout. It has gone through 4 rounds of financing, and the investors include well - known institutions such as the National Integrated Circuit Industry Investment Fund Phase II and Legend Capital.

The company has submitted a prospectus to the Hong Kong Stock Exchange. If successful, it will become the "first RISC-V stock".

The IPO document shows that ESWIN uses a new - generation RISC-V computing architecture, innovative domain - specific algorithms, and IP modules to build a dedicated software - hardware platform and provide competitive system - level solutions. As of September 30, 2025, ESWIN had commercialized more than 130 products, built more than 590 IP modules, and applied for more than 1,660 patents in total, including more than 200 RISC-V - related patents, and had more than 20 series of RISC-V cores.

In the field of intelligent computing, ESWIN launched the EIC77 series of products based on RISC-V - the edge computing SoC EIC7700 and the intelligent computing SoC EIC7702. Based on this series of products, it has launched various product forms such as SBC single - board computers, SOM core boards, OSM open - standard modules, AI acceleration cards, AI video transcoding cards, and AI industrial computers, which can provide customized products and solutions for the diverse needs of different industries.

The breakthroughs in AI, sensor technology, and 5G connectivity have promoted the rapid development of the intelligent automobile industry and significantly increased the penetration rate of intelligent vehicles. ESWIN is also continuously expanding application scenarios in the automotive field, launching a variety of automotive chip products such as in - vehicle control MCUs, high - speed data transmission (SerDes), electronic exterior rear - view mirrors (CMS), head - up displays (HUD), touch - interactive devices, and power management. It has established cooperation with many leading Tier 1 manufacturers in the industry such as Yanfeng, Foryou, Aitek, Jingwei Hengrun, and Desay SV, and its customers cover vehicle manufacturers such as SAIC, BYD, Chery, and Jianghuai Automobile.

To address the pain points in the RISC-V industry, ESWIN launched the RISAA Ecological Technology Platform and the RISC-V Digital Infrastructure (RDI) industrial concept. The RISAA Ecological Technology Platform integrates core technologies such as RISC-V and AI, providing a software - hardware integrated development environment for developers and reducing the technical threshold. Currently, the platform has supported the AI development of embodied intelligent devices and promoted the penetration of technology into multiple industries such as education, transportation, and energy.

Other players in the RISC-V track are also following up. StarFive Technology has raised more than 1 billion yuan in total; Zhongke Benyuan completed its Series B2 financing; Jindi Space received more than 600 million yuan in Series B financing in January this year; in January 2026, Lanxin Computing completed its Series A financing.

SiFive's $400 million financing has fired the starting gun for the re - evaluation of RISC-V. This year, RISC-V will make efforts in two dimensions simultaneously: edge - side AI chips will achieve substantial breakthroughs, and the server CPU field will see a concentrated explosion. As the track with the heaviest R & D investment, the highest technical difficulty, and the greatest layout challenges, the server CPU is destined to be the key highlight of RISC-V development this year.

This article is from the WeChat official account "Semiconductor Industry Insights" (ID: ICViews), author: Jiulin. Republished by 36Kr with permission.