Niuxin Semiconductor completed the interoperability verification of UB protocol IP.

Recently, NiuXin Semiconductor has made significant progress in the R & D of the UB protocol IP: The prototype verification platform equipped with the self - developed controller IP has completed the docking with the standard UB network tester of Shenzhen Wanliyan Technology Co., Ltd., meeting the requirements of the standard protocol. This progress marks a crucial step for NiuXin Semiconductor's self - developed UB controller IP in terms of protocol consistency.

Figure 1: NiuXin's self - developed controller IP successfully docks with Wanliyan's UB network tester

UB Protocol: A New - Generation Protocol for Super - Node Interconnection

As the parameter scale of AI models grows from hundreds of billions to trillions, single - machine training can no longer meet the requirements, and tens of thousands of computing powers need to be coordinated efficiently. Against this background, the UB (UnifiedBus, Chinese name "Lingqu") protocol initiated by Huawei came into being. It achieves ultra - low latency and high bandwidth at the bus level between chips and has the large - scale expansion ability at the network level, providing a new path for building an efficiently coordinated computing power infrastructure.

The core value of the UB protocol lies in the pooling and decoupling of computing power resources, enabling heterogeneous computing units such as CPUs, GPUs, NPUs, memories, and storages to break through physical boundaries and efficiently call remote resources as if accessing local resources, thus fully unleashing the overall computing power potential of the cluster.

NiuXin Semiconductor is one of the earliest domestic enterprises to layout the UB protocol. Its self - developed PHY IP and controller IP cover the entire protocol stack from the physical layer, data link layer to the transaction layer, and are the core bridge to transform the UB protocol from a standard specification into mass - producible silicon wafers.

Technical Breakthrough: Self - developed IP Completes Protocol - Layer Interoperability Verification

NiuXin Semiconductor has completed the docking with Wanliyan's standard UB network tester based on its self - developed controller IP, and the link establishment and debugging were successful. This controller IP supports both synchronous memory access and asynchronous communication semantics, can dynamically switch the link bandwidth without interrupting the business, supports the switching of multiple FEC modes, and provides flexible configuration of key specifications such as the number of IP Lanes and the rate. In terms of flow control management, it adopts a Credit - based mechanism to efficiently support multiple virtual channels and their cache sharing. In terms of reliability, it provides a solid guarantee for data transmission through the CRC protection and error re - transmission mechanism at the data link layer.

The verification follows the UB2.0 protocol specification, covering the physical coding sub - layer, MAC sub - layer, and link - layer negotiation functions. After the consistency verification by Wanliyan's standard UB network tester, the link establishment is stable, the data transmission is accurate, and the implementation of the underlying protocol is highly consistent with the specification requirements, laying a solid foundation for subsequent interoperability tests with more ecological partners.

Figure 2: Software interface of Wanliyan's standard UB network tester

This joint debugging is not only a technical docking but also an important practice of the coordination of the UB ecological industrial chain.

For the UB ecosystem, the interoperability verification at the IP layer is the prerequisite for the prosperity of the entire ecosystem. Chip design companies need mature and reliable IP support, system manufacturers need chip products that have passed interoperability verification, and test instrument manufacturers need real hardware to improve their testing capabilities. The verification has connected the most basic links from IP to chips, from systems to testing, providing a reproducible model for ecological partners to conduct compatibility verification.

For domestic computing power interconnection, as one of the few domestic enterprises with the ability to independently develop complete SerDes and high - speed interface IP, NiuXin Semiconductor's in - depth support for the UB protocol IP means that domestic chip design companies have an independently controllable IP option when introducing UB interfaces, which is of strategic significance for the supply - chain security of the computing power infrastructure.

In the future, NiuXin will continue to deepen the interoperability tests with ecological partners to further improve the compatibility and stability of the IP; at the same time, it will promote the collaborative iteration of high - speed Serdes IP and controller IP, and provide a complete domestic - made interface IP solution for rates of 112G and above. NiuXin is committed to becoming a core IP supplier in the UB ecosystem and providing solid support for the large - scale deployment of domestic computing power clusters.