The world's first innovative memory chip from Fudan University is published in Nature and has been taped out.

According to a report by Xin Dongxi on October 11th, on October 8th, a research team from Fudan University developed the world's first two-dimensional-silicon-based hybrid architecture chip. The relevant research results were published in the international top academic journal Nature.

This achievement deeply integrates two-dimensional ultrafast flash memory with the mature complementary metal-oxide-semiconductor (CMOS) process, overcoming the key challenges in the engineering of two-dimensional information devices and solving the technical problems of storage speed.

According to the official account of Fudan University, the performance of this chip "crushes" the current Flash memory technology, achieving the engineering of a hybrid architecture for the first time. Relying on the previous research results and integration work, the chip developed this time has successfully completed tape-out.

The full-chip test based on the CMOS circuit controlling the two-dimensional storage core supports 8-bit instruction operations, 32-bit high-speed parallel operations, and random addressing, with a yield rate as high as 94.34%.

The title of the paper is "Fully Functional Two-Dimensional-Silicon-Based Hybrid Architecture Flash Memory Chip". Liu Chunsen, a researcher, and Zhou Peng, a professor from the School of Integrated Circuits and Micro-Nano Electronics Innovation and the National Key Laboratory of Integrated Circuits and Systems at Fudan University, are the corresponding authors of the paper. Liu Chunsen, doctoral students Jiang Yongbo, Shen Bojian, Yuan Shengchao, and Cao Zhenyuan are the first authors of the paper.

Paper link:

https://www.nature.com/articles/s41586-025-09621-8

This is another milestone breakthrough achieved by Fudan University in the field of two-dimensional electronic device engineering half a year after the advent of the "PoX" picosecond flash memory device.

In April this year, the Zhou Peng-Liu Chunsen team proposed the "PoX" two-dimensional flash memory prototype device in the journal Nature, achieving ultra-high-speed non-volatile storage of 400 picoseconds. This is the fastest semiconductor charge storage technology to date, providing the underlying principle for breaking through the bottleneck of computing power development.

The "Changying (CY-01) architecture" developed by their team deeply integrates the two-dimensional ultrafast flash memory device "PoX" with the mature silicon-based CMOS process, and develops a fully functional two-dimensional NOR flash memory chip based on the Atom-to-Chip (ATOM2CHIP) technology.

Optical microscope photo of the two-dimensional-silicon-based hybrid architecture flash memory chip (Source: Fudan University)

According to the paper, two-dimensional materials expand the scalability of silicon technology devices and drive fundamental innovations in device mechanisms. Although significant progress has been made in the integration of two-dimensional materials or 2D-CMOS hybrid integration, there is still a lack of a complete system that can truly translate the advantages of devices into practical applications.

Currently, two-dimensional semiconductors cannot achieve the logic circuit performance comparable to that of advanced silicon technologies. Therefore, combining two-dimensional electronics with mature silicon CMOS logic circuits is a promising path to fully leverage the system-level advantages of two-dimensional electronics.

Relevant frontier research mainly focuses on combining two-dimensional materials with the CMOS process to improve device performance. There is still a lack of core technologies to transplant the advantages of the two-dimensional device concept into the system. Developing such a systematic process and design methodology requires a full-stack on-chip process covering planar integration, three-dimensional architecture, and chip packaging, and cross-platform system design.

"Memory is the most likely type of device for the first industrialization of two-dimensional electronic devices. Because it does not impose higher requirements on material quality and process manufacturing, and the achievable performance indicators far exceed the current industrialization technologies, which may generate some disruptive application scenarios." Zhou Peng, who has been deeply involved in the memory field for many years, believes.

Currently, most integrated circuit chips in the market are manufactured using CMOS technology, and the industrial chain is relatively mature. The team believes that if they want to accelerate the incubation of new technologies, they need to fully integrate two-dimensional ultrafast flash memory devices into the traditional CMOS semiconductor production line, which can also bring breakthroughs to CMOS technology.

"It took about 24 years from the first prototype transistor to the first CPU. By integrating advanced technologies into the existing CMOS production lines in the industry, this process that originally required decades of accumulation has been significantly compressed, and the exploration of disruptive applications can be further accelerated in the future." Liu Chunsen summarized.

The team spent five years exploring and making trial and error in the early stage, conducting collaborative research on multiple aspects such as single devices and integration processes. Their first integration work was published in Nature Electronics in 2024, achieving a breakthrough in the yield rate of two-dimensional materials on the most ideal native substrate, which laid the foundation for solving problems on the real and complex CMOS substrate.

Transmission electron microscope photo of the two-dimensional-silicon-based hybrid architecture flash memory chip (Source: Fudan University)

How to integrate two-dimensional materials with CMOS without destroying their performance is the core challenge to be overcome.

There are many components on the surface of the CMOS circuit, while the thickness of two-dimensional semiconductor materials is only 1 - 3 atoms. If the two-dimensional materials are directly laid on the CMOS circuit, the materials are likely to break.

"It's like when we look at Shanghai from space, it seems very flat, but there are actually buildings with different heights of more than 400 meters, more than 100 meters, or dozens of meters inside the city. If we lay a thin film over the city, the film itself will be uneven." Zhou Peng vividly metaphorized.

Therefore, two-dimensional semiconductor researchers around the world can only process materials on extremely flat native substrates at present. One solution is to "grind flat" the CMOS substrate to adapt to the two-dimensional materials, but it is not realistic to achieve atomic-level flatness.

The Zhou Peng-Liu Chunsen team decided to start with two-dimensional materials that have certain flexibility. Through a modular integration scheme, they first separately manufacture the two-dimensional storage circuit and the mature CMOS circuit, and then integrate them with the CMOS control circuit through high-density monolithic interconnection technology (micron-scale through holes) to achieve a complete chip integration.

This innovation in the core process enables the two-dimensional materials to closely adhere to the CMOS substrate at the atomic scale, ultimately achieving a chip yield rate of over 94%.

In addition, the prepared two-dimensional flash memory unit supports fast operations of 20 nanoseconds, and the energy consumption per bit is as low as 0.644 picojoules.

The team further proposed a cross-platform system design methodology, including the co-design of two-dimensional-CMOS circuits and the design of two-dimensional-CMOS cross-platform interfaces, and named this system integration framework the "Changying (CY-01) architecture".

Its cross-platform system design supports the instruction-driven working mode of the two-dimensional NOR flash memory chip, with 32-bit parallel processing capabilities and random access functions.

These features have been verified through chip testing: the test clock frequency is set to 5 MHz, and the programming pulse is optimized to 2.5 clock cycles.

This method provides a reliable guarantee for the compatibility between emerging mechanism-driven two-dimensional electronic devices and the mature CMOS platform.

The team believes that these system-level achievements mark an important milestone in extending the advantages of two-dimensional electronic technology to the field of practical applications.

Next, the Zhou Peng-Liu Chunsen team plans to establish an experimental base, cooperate with relevant institutions, establish an independently led engineering project, and plans to integrate the project to the megascale level within 3 - 5 years. The intellectual property rights and IP generated during this period can be licensed to cooperative enterprises.

Looking forward to the future, the team hopes that this technology will disrupt the traditional memory system, replacing the multi-level hierarchical storage architecture with a general-purpose memory, providing faster and lower-energy data support for cutting-edge fields such as artificial intelligence and big data, and making two-dimensional flash memory the standard storage solution in the AI era.

This article is from the WeChat official account Xin Dongxi, author: ZeR0, editor: Mo Ying. Republished by 36Kr with permission.