Hybrid bonding, a hot topic

Hybrid bonding has been pushed to the forefront.

In Yole's latest forecast, hybrid bonding has the steepest growth curve in advanced packaging. Both Samsung and SK Hynix have stated that they will adopt hybrid bonding technology by the time of HBM 5.

Currently, Hanmi Semiconductor has announced an investment of 100 billion won to develop next - generation hybrid bonding technology; LG Electronics is targeting hybrid bonding equipment for HBM applications; and domestic Tuojing Technology regards hybrid bonding equipment as its second growth curve.

The era of hybrid bonding has arrived.

 01 Transformation of Advanced Packaging

Packaging has become an important factor driving the development of Moore's Law, especially advanced packaging.

Generally speaking, the development of packaging modes is accompanied by changes in bonding methods. The main development line of bonding is to achieve higher - density interconnections and smaller packaging sizes.

There have been multiple transformations in the history of packaging.

Flip - Chip, as an "evergreen tree" in the history of packaging, originated in the 1960s and is one of the most widely used and technologically mature solutions to date.

The functional area of the chip faces down and is placed back - to - back against the substrate in an inverted manner, and is interconnected with the substrate through Bumps. However, its core shortcoming has become more and more obvious as the chip integration level increases: the reflow soldering of flip - chip is carried out in a furnace, and the entire circuit board will be heated. During the cooling process, due to the mismatch of thermal expansion coefficients, the bonding may be weakened or the chip may warp.

Thermal Compression Bonding (TCB) was jointly developed by Intel and ASMPT and was introduced into mass production in 2014. Its core innovation lies in "local heating".

Heat and pressure are applied to the chips one by one from the top to achieve bonding. When the chips and the substrate are bonded by thermal compression, instead of heating the entire substrate, only the chips and their solder balls are heated, thereby reducing the risk of warping, taking into account both reliability and packaging efficiency, which exactly meets the needs of high - density stacked products such as High - Bandwidth Memory (HBM).

For this reason, currently, the HBM products of giants such as Samsung, SK Hynix, and Micron all use TCB as the standard packaging solution, making it firmly occupy the "mainstream position" in current advanced packaging.

Hybrid bonding is characterized by bump - less connection. Although the TCB technology has solved the problem of thermal expansion, the pursuit of higher - density interconnections in the packaging industry has never stopped. The emergence of hybrid bonding technology has broken out of the inherent framework of traditional solutions that rely on bumps.

Previously, bump technology based on solder was used in packaging. Now, hybrid bonding can use copper - to - copper connections, which brings three benefits: First, the top chip and the bottom chip are flush with each other; Second, there are no bumps between the chips, which can be miniaturized to ultra - fine pitches; Third, no solder is used, avoiding problems related to solder.

From the perspective of the technology iteration logic, hybrid bonding and TCB are not in a simple "replacement" relationship, but complementary solutions for different demand scenarios.

TCB, with its maturity and cost advantages, remains the first choice for mass - produced products such as HBM; hybrid bonding targets the future demand for chips with higher integration levels, such as advanced storage with more than 20 layers of 3D stacking and AI chips with extremely high computing power density, and has become the core direction for the industry to layout next - generation packaging technology.

From a market perspective, TCB packaging is still the mainstream. Yole Group estimates that the revenue of TCB bonders will be approximately $542 million in 2025 and is expected to grow to approximately $936 million by 2030, with a compound annual growth rate of 11.6%. The order volume tracks the production capacity ramp - up of HBM3E and the transition to thicker stacks. SK Hynix and Micron made large - scale purchases in the first half of 2025.

According to J.P. Morgan's forecast, the overall market size of TCB bonders for HBM will grow from $461 million in 2024 to $1.5 billion in 2027, more than tripling.

Currently, the TCB bonder market presents a "six - strong pattern". Among them, South Korea has Hanmi Semiconductor, SEMES, and Hanwha SemiTech; Japan has Toray and Shinkawa; and Singapore has ASMPT. Among them, Hanmi Semiconductor has the highest market share in the HBM TCB bonder market.

The popularity of TCB equipment can be seen from Hanmi Semiconductor's performance. The performance forecast recently released by Hanmi Semiconductor shows that the company expects its consolidated revenue in the first quarter of 2025 to reach 140 billion won (approximately 690 million yuan), and its operating profit to reach 68.6 billion won. Compared with the same period in 2024, the revenue increased by 81%, and the operating profit increased by as much as 139%. Moreover, in April this year, Hanmi Semiconductor officially notified its domestic customers in South Korea that the price of TCB for manufacturing HBM will increase by 25%.

 02 Hybrid Bonding, Diverse Applications

The proposal of hybrid bonding has refreshed the packaging methods in the industry and also marks a fundamental transformation in semiconductor integrated circuit technology.

Currently, there are two ways of hybrid bonding: One is to bond a single chip of a single size to a wafer of a larger - sized chip (die - to - wafer: D2W), and the other is to bond two whole wafers of the same size together (wafer - to - wafer: W2W).

Sony was the first to take the plunge. In 2015, Sony applied Cu - Cu direct bonding in CMOS image sensors, becoming the first mass - produced product using hybrid bonding. For some time later, hybrid bonding was always used in CMOS image sensors. As the hybrid bonding technology matures, it has gradually moved towards scenarios such as logic, 3D NAND, and HBM.

In 2022, AMD launched its first Vertical Cache (V - Cache) gaming processor, Ryzen 7 5800X3D. This processor divides the computing and I/O functions into independent Chiplets. The most special thing is that a stacked SRAM expansion chip is added on top of the computing Chiplet, expanding the L3 cache from 32 MB to 96 MB. This additional memory is manufactured on a separate chip, but hybrid bonding is used for connection, allowing the expanded cache to operate as if it were directly integrated on the computing chip.

AMD Instinct MI300 series architecture chip stack

In 2024, AMD launched another chip using hybrid bonding technology - the Instinct MI300 series, which is specially designed for AI training applications. With the MI300, AMD competes directly with Nvidia in the lucrative AI hardware market.

In the field of 3D NAND, Yangtze Memory Technologies' Xtacking architecture uses hybrid bonding for the CMOS and storage arrays, achieving higher density, smaller area, and faster speed. Xtacking 4.0 can achieve an IO rate of 3600 MT/s. Kioxia has adopted the CMOS Direct Bonded Array (CBA) in its latest BiCS8 218 - layer 3D NAND.

 03 Hybrid Bonding, in the Limelight

Although it has many application fields, the most prominent demand for hybrid bonding is still in HBM.

Different from the replacement cycle of ordinary memory, the update speed of HBM is getting faster and faster. GPU suppliers are accelerating the release frequency of new technologies to once a year, which is much faster than the typical refresh cycle of memory standards. The transformation of traditional memory technology usually takes four to five years. Now, HBM is updated every two to two and a half years.

This places higher requirements on HBM.

Joungho Kim, the "Father of SK Hynix HBM" in South Korea, emphasized this year: Emerging technologies such as hybrid bonding will play a decisive role in future memory design.

Future HBM designs may require hundreds of thousands or even millions of through - silicon vias. To support such high density, the line spacing needs to be significantly reduced. Joungho Kim believes that traditional thermal compression bonding equipment will be difficult to keep up with the demand, so hybrid bonding technology has become indispensable. Currently, the bonding pitch is still in the tens of micrometers range, while the next - generation technology must reach the 1 - micrometer level.

Analysis institution TrendForce said that considering the requirements for stacking height limitation, I/O density, and heat dissipation, the three major HBM memory giants have decided to fully adopt hybrid bonding technology in the HBM5 20hi (20 - layer stacking) generation.

Samsung revealed at an artificial intelligence semiconductor forum in Seoul that the company plans to adopt hybrid bonding technology in its HBM4 to reduce heat generation and achieve an ultra - wide memory interface. In addition, this year, Samsung also signed a patent license agreement for hybrid bonding technology required for stacking 400 - layer NAND with Yangtze Memory Technologies.

SK Hynix announced in 2023 that its hybrid bonding process for HBM manufacturing had obtained reliability certification. The third - generation HBM (HBM2E) of SK Hynix stacks DRAMs into 8 layers. After being manufactured using the hybrid bonding process, it passed all reliability tests. In April this year, a vice - president of SK Hynix said that SK Hynix is promoting the application of hybrid bonding in HBM. Currently, it is in the R & D stage and is expected to be applied to HBM4E at the earliest.

Micron obtained the license for Cu - Cu hybrid bonding from Xperi in 2022, and its HBM3E chip packaging uses a copper - silicon hybrid bonding process.

The booming field of hybrid bonding has also become the focus of competition among many equipment enterprises.

In the hybrid bonding track, the global hybrid bonding equipment market is mainly dominated by international leading enterprises. Among them, BESI in the Netherlands is the leader in this field, with a market share of up to 67%. From 2021 to 2024, the company's cumulative hybrid bonding orders have exceeded 100 sets. In 2024, the first batch of hybrid bonding equipment with an accuracy of 100 nm was shipped, and it plans to achieve hybrid bonding equipment with an accuracy of 50 nm by the end of 2025.

Hanmi Semiconductor also regards hybrid bonding as the key to future higher HBM stacking. Recently, Hanmi Semiconductor dropped a "bombshell" by announcing that it will invest 100 billion won to fully enter the R & D and production fields of hybrid bonding technology. Hanmi Semiconductor has also formulated a clear equipment release plan, aiming to successfully launch hybrid bonding machine equipment by the end of 2027.

Similarly, ASMPT has also made progress in hybrid bonding. Since 2021, ASMPT has been deploying in hybrid bonding. In the third quarter of 2024, it delivered its first hybrid bonding equipment to a logic customer and received the first orders for two next - generation hybrid bonding equipment for HBM applications, which are expected to be delivered in the third quarter of 2025.

In July, LG Electronics' Production Technology Institute (PTI) also reported that it had launched the development of hybrid bonding equipment, aiming to achieve large - scale mass production in 2028.

In general, the rise of hybrid bonding technology is an inevitable choice for the semiconductor industry when Moore's Law is approaching its physical limit. From the heavy investment of equipment enterprises to the active application of major manufacturers in different fields, it all demonstrates its vigorous vitality. Only players who lay out the technology in advance and build industrial chain advantages can hold the "key chips" that determine the pattern in the next round of competition in the semiconductor industry.

This article is from the WeChat public account "Semiconductor Industry Insights" (ID: ICViews), author: Jiulin, published by 36Kr with authorization.