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This chip initiates the Apple Empire.

半导体行业观察2025-08-05 10:40
The MOS 6502 chip spurred the PC revolution at a low price in 1975, leading to a settlement in a lawsuit filed by Motorola.

When a chubby geek stuffed a specific chip into a specific computer circuit board and powered it on, the universe suddenly paused for a moment. That geek was Steve Wozniak, the computer was the Apple I, and the chip was the 8 - bit microprocessor 6502 developed by MOS Technology.

This chip and its variants later became the brains of pioneering computers such as the Apple II, Commodore PET, Commodore 64, and BBC Micro, not to mention gaming systems like the Nintendo Entertainment System and Atari 2600 (also known as the Atari VCS).

Chuck Peddle, one of the chip's creators, recalled the launch of the 6502 at a trade show in 1975. "We had two glass jars full of chips," he said. "I had my wife sit there and sell them." (In 2016, Peddle admitted that at the time, he only had enough processors to fill the top layer of the jars - most of them were filled with non - working chips.) A large crowd flocked to them. The reason was that the 6502 was not only faster than its competitors but also much cheaper, selling for $25, while the Intel 8080 and Motorola 6800 both sold for nearly $200.

Bill Mensch, who co - developed the 6502 with Peddle, said that the key to achieving cost reduction was the streamlined instruction set and a manufacturing process with "a yield 10 times higher than that of competitors." The 6502 almost single - handedly drove down the price of processors, thus fueling the personal computer revolution.

This year marks the 50th anniversary of the chip's debut. Let's take a look back at its glorious past.

A Revolutionary Chip

The 6502 was first delivered to customers in September 1975. It was one of the few iconic microprocessors in the late 1970s and early 1980s. To understand the impact of this chip, just look at its presence in millions of 8 - bit systems at that time:

  • Apple II
  • Atari 400 and Atari 800
  • Atari VCS (6507)
  • BBC Micro
  • Commodore PET and VIC - 20
  • Commodore 64 (6510)
  • Commodore 128 (8502)
  • Nintendo Entertainment System (Ricoh 2A03)

The ultimate popularity of personal computers based on the 6502 was the end result of a long process that began with Motorola's inflexibility in the price of the 6800 processor and the disappointment of Chuck Peddle and Bill Mensch with Motorola.

In March 1974, Motorola released the 6800, but it didn't go into production until November 1974. Initially, the chips were sold in small batches at a price of $360 per processor. In early 1974, Chuck Peddle had been holding marketing seminars for major customers - he smelled an opportunity and tried to persuade Motorola to launch a low - cost version for the industrial control market, but they weren't interested.

By August, Peddle formulated a plan to leave Motorola and join MOS Technology across the United States, a small integrated circuit manufacturer near Valley Forge, Pennsylvania. Mensch was one of the 6502 designers who joined MOS with Peddle. He said, "The company was very small at that time. The three founders, Mort Jaffe, John Paivinen, and Don McLaughlin, assembled a small team of highly capable calculator chip and system designers, a fast - paced photomask factory, and a high - yield large - chip manufacturing team from TI.

So, you went from Motorola (which had relatively unlimited design and manufacturing budgets) to a design team with insufficient funds and very limited logic and transistor simulation design tools. We had to manually simulate/check the logic in our heads and use very limited circuit simulations. In other words, the budget was really low. The data sheets and all the documentation were done by the design team." Peddle convinced Mensch and six other Motorola engineers - Harry Bawcom, Ray Hirt, Terry Holdt, Michael Janes, Wil Mathys, and Rod Orgill - to join him and several other MOS engineers to jointly design and produce the chips that later became the MCS 6501/6502 chipset.

A photo taken at the announcement of the 6502 in August 1975 (from left to right: Chuck Peddle, Rod Orgill, Terry Holdt, Ray Hirt, and Wil Mathys sitting in the back)

Mensch said, "At MOS, John Paivinen, Walt Eisenhower, Don Payne (the head of the mask shop), and Sydney Anne Holt (the mask designer) formed the design and manufacturing team that created the high - yield NMOS depletion - load process. The final result was the MCS 6501/6502, 6530/6532 memory, ROM timer, and IO combination, and the 6520/6522 PIA/VIA microprocessor series."

Starting with Disruptive Manufacturing

The manufacturing process of semiconductors is a bit like printing a newspaper. Sort of, but not exactly. Maybe it's more like the process of manufacturing a printed circuit board. However, newspapers, printed circuit boards, and semiconductors have the following in common:

  • Production requires a large, complex manufacturing plant with many steps;
  • Lithography can be used to make multiple copies of the original master;
  • The main component needs to create content and layout suitable for a defined area;

It's just that the semiconductor industry has been expanding for decades without any sign of slowing down, while the newspaper industry has been struggling in the Internet age.

Semiconductor manufacturing takes place in a manufacturing plant or "fab". The raw, unpackaged product is called a die (plural: "dice" or "dies" or "die"), and the original master is called a photomask set or mask set. Engineers stuff a bunch of tiny shapes onto the photomasks in the mask set; each photomask defines an independent step in the lithography process, used to form various features of individual circuit elements (usually transistors, sometimes resistors or capacitors), or the conductive paths connecting them, or flat square areas called "pads" for connecting to the pins of the packaged chip. Ultra - pure, polished circular semiconductor wafers are used; these wafers are usually made of silicon (Si), but sometimes they are made of other semiconductor crystals, such as gallium arsenide (GaAs), gallium nitride (GaN), silicon carbide (SiC), or a hybrid of elements on the right side of the periodic table: AlGaAsPSnGeInSb. These wafers are sliced from a single ingot, which is basically a large, shiny circular semiconductor "sausage", usually formed by pulling a seed crystal upward from a molten material using the Czochralski process and rotating it, a process that's hard for us to pronounce correctly.

There are a bunch of chips arranged in an array on the wafer, covering most of the wafer's surface; these chips are separated into individual chips, go through a series of testing and packaging steps, and are finally placed in a package with conductive pins or balls, connected to the printed circuit board through the pins or balls. The packaged semiconductor is an integrated circuit (IC) or "chip". The percentage of working chips on the wafer is called the device yield. Chip size and yield are crucial in the semiconductor industry: they are both directly related to manufacturing costs. If a chip designer or process engineer can reduce the chip area by half, then about twice as many chips can be placed on the wafer at the same cost. If the yield can be increased from 50% to 100%, then twice as many chips can be produced for final use at the same cost. Yield depends on various processing factors and is worse for large - chip ICs: each specific manufacturing process has a characteristic defect density (number of defects per unit area), so the larger the chip size, the greater the probability that a given chip will have a defect and fail.

Imagine defects as bullets; one hit and it's over. The following figure shows three simulated circular wafers with 40 defects in the same positions but different chip sizes. There are fewer chips of the larger size, and due to the larger cross - sectional area of each chip, they are more prone to defects, resulting in a lower final yield.

The various steps of the lithography process are carried out under various harsh environmental conditions - 1000°C, high pressure, or vacuum, and sometimes toxic gases such as silane or arsine are used, which tend to react violently when exposed to oxygen in the air - and are usually divided into the following categories:

  • Deposit atoms of a certain element onto the wafer;
  • Coat the wafer with photoresist;
  • Expose the photoresist in a specific pattern (this is where the photomask is needed);
  • Etch away the material;
  • Anneal - this is a heating/cooling process that allows the atoms in the wafer to "relax" and reduces crystal stress;
  • Clean the wafer;

Through the wonders of modern chemistry, we connect a bunch of transistors and other things together.

The term "process" in semiconductor manufacturing usually refers to a precisely controlled series of specific steps used to form a semiconductor with specific electrical characteristics and geometric tolerances. The design of an integrated circuit (IC) revolves around a specific process with the desired characteristics; the same process can be used to create many different devices. Migrating an integrated circuit design from one process to another is not easy - this is an important factor contributing to today's supply - chain dilemmas.

Let's take another look at that micrograph:

The original 6502 produced in 1975 contained 3510 transistors and 1018 depletion - load pull - up resistors, packaged in a die measuring 0.168 inches × 0.183 inches (≈ 4.27 mm × 4.65 mm) and produced on a 3 - inch silicon wafer. The process used to manufacture the 6502 was the N - channel silicon - gate depletion - mode 5 - volt process, also known as the "019" process. This process was developed by Terry Holdt of MOS Technology and required seven photomasks and about 50 steps to create the following layers:

  • Diffusion
  • Depletion implantation
  • Buried contact (connecting N + and polysilicon)
  • Polysilicon
  • Pre - ohmic contact
  • Metal (aluminum)
  • Passivation (silicon dioxide coating)

You can take a closer look at these layers in a high - resolution micrograph (also known as a "chip photo") of the 6502.

These larger square areas are bonding pads, which are connected to the pins of the 6502 lead frame through bonding wires. The two ends of the bonding wires are connected by ultrasonic welding, and sometimes the welding joints are heated.

The small crosses and rectangles are alignment marks, used to align the mask and check the line width. The large square above them is a test structure, not connected to any external pins, but its functionality can be checked during wafer probing.

In these images, different layers have different visual characteristics (except for the depletion layer):

  • The silicon substrate is a textureless gray;
  • Aluminum metal has a granular texture;
  • It appears pink when covered by the passivation layer (most of the chip);
  • When uncovered, as in the bonding pads and test pads, it is more gray in color;
  • Small green dots represent the contact between the metal and silicon;
  • The diffusion region has a glassy appearance with discoloration around the edges;
  • Polysilicon is usually light brown, but when it passes through the diffusion region, it turns green, forming the gate of a MOSFET - Tada! Instant transistor! - controlling whether current can flow between adjacent diffusion regions.

First to Adopt the Depletion - Load NMOS Process

One of the keys to the success of the 6502 was that they were the first to adopt the depletion - load NMOS process ("conventional" enhancement - mode N - channel MOSFETs were used as pull - down switches; depletion - mode N - channel MOSFETs were used as loads, with their gates and sources connected together as current sources), enabling mass production ahead of Motorola. This allowed the design team to achieve higher performance within a smaller chip size.

Most of the 6502's design was done with pen and paper, and the layout was also computer - assisted. Peddle was the project leader, focusing on the business side; he also worked with Rod Orgill and Wil Mathys to develop the instruction set architecture - basically an abstract model for programmers of how the chip