Apple's self-developed image sensor? A patent makes a stunning debut.

Apple may be quietly preparing one of the most significant advancements in the field of image sensor design – it could change everything from iPhones to professional cinema equipment.

Recently, Apple has newly released a patent titled "Stacked Pixel Image Sensor with High Dynamic Range and Low Noise". This discovery may signal a breakthrough that could reshape the mobile and professional imaging fields. Apple claims that its stacked sensor architecture has a dynamic range of up to 20 stops, perhaps gearing up to compete with, and even surpass, the giants in the movie camera technology field.

Outperforming the Best Sensors

A newly released Apple patent titled "High Dynamic Range Low Noise Stacked Pixel Image Sensor" reveals a significant advancement in imaging technology. Although Apple is well - known for its custom chips and camera software, this patent hints at a more ambitious goal: a fully self - designed image sensor whose dynamic range is expected to rival, and even exceed, that of leading movie cameras. Moreover, this is not just theoretical – the sensor architecture claims a dynamic range of up to 120 dB, equivalent to nearly 20 stops of dynamic range. This is much higher than that of current industry giants, such as the ARRI ALEXA 35.

As stated in Apple's patent description:

"The embodiments of the invention described herein provide an image sensor containing a novel 3T pixel design. This sensor can achieve high dynamic range, low noise, and avoid artifacts that may occur in traditional 4T pixel arrays. The image sensor includes a sensor chip stacked on a logic chip. Each 3T pixel contains a sensing circuit on the sensor chip, which includes a photodiode and a lateral overflow integration capacitor (LOFIC) circuit to sense under various lighting conditions from indoor to bright sunlight without the need for automatic exposure control. In addition, each pixel contains a pixel circuit on the logic chip, which includes a current storage circuit. The current storage circuit is used to sense the noise level in the detector element. The signal output by the current storage circuit can suppress thermal noise (kTC) using correlated double sampling (CDS)."

What's in Apple's Patent?

The patent outlines a stacked sensor composed of two layers: a sensor chip (with photodiodes and analog circuits)

and a logic chip (for processing readout, noise cancellation, and control)

This stacked approach is similar to Sony's, enabling Apple to package advanced circuits into a thinner sensor module, which is well - suited for smartphones and AR/VR devices such as the Vision Pro. But the real innovation lies in the pixel - level architecture, characterized as follows:

1. LOFIC (Lateral Overflow Integration Capacitor)

This mechanism allows the sensor to handle light overflow in three charge storage levels, automatically adapting to extreme brightness or darkness – all at once. This is why a 20 - stop dynamic range can be achieved.

2. Built - in Noise Sensing Circuit

The current storage circuit within each pixel can detect and eliminate thermal noise in real - time, meaning that even in low - light conditions, the final image is clearer – no post - processing or AI tricks required.

3. 3T Pixel Design (Not 4T)

Surprisingly, Apple has adopted a 3 - transistor design, which is generally considered simpler but noisier. However, thanks to the above - mentioned innovations, this design has lower noise than the standard 4T sensor, thus providing better performance with fewer components and higher efficiency.

As Apple states:

"The LOFIC circuit 44 in this example includes two charge storage capacitors 50 and 52 and two LOFIC transistors (LOFIC1 and LOFIC2) 54 and 56 connected in series to the floating diffusion node 42. The first LOFIC transistor (LOFIC1) 54 connects the floating diffusion node to the charge input terminal of the first charge storage capacitor 50, which has a smaller capacitance, for example, about 20 fF. The second LOFIC transistor 56 connects the charge input terminal of the first charge storage capacitor 50 to the charge input terminal of the second charge storage capacitor 52, which has a larger capacitance, for example, about 500 fF. In this configuration, the floating diffusion node 42 itself will be used to store and read out photo - charges in low - light conditions; the charge storage capacitor 50 will be used to store and read out photo - charges in medium - light conditions; the charge storage capacitor 52 will be used to store and read out photo - charges in high - light conditions. This LOFIC structure enables the detector element 26 to sense light within a dynamic range of about 120 dB. Alternatively, other LOFIC structures can be used, with fewer or more capacitors and transistors."

What Does This Product Mean?

If this technology is implemented (perhaps in the future iPhone 17 Pro or Apple Vision Pro 2), it could lead to:

• Cinematic HDR on mobile devices
• Real - time noise - free video capture
• Ultra - thin form factor with professional - quality imaging and extremely high DR (20 - stop dynamic range)

Apple may be preparing to break free from its dependence on Sony's high - end camera sensors and enter the image sensor market as a competitor rather than a customer. This also indicates that Apple's next leap in computational photography may be rooted in image - sensor - first innovation rather than software or artificial intelligence.

Dynamic range and noise are two major constraints in digital imaging. A mobile or compact sensor that can provide a 20 - stop dynamic range and advanced on - chip noise suppression is not just an improvement but a game - changer.

This could impact:

• Mobile cinematography
• HDR streaming content
• AR/VR visual fidelity
• Even in professional movie - making kits, where compactness and quality must coexist

Since this is an Apple product, it's not hard to imagine that the company will deeply integrate the sensor with neural engine processing, making it even more powerful under extreme conditions.

In our view, this patent may not be very eye - catching at present, but its impact is far - reaching. Apple is not just improving camera software; it's redefining image sensors at the chip level. If this technology goes into production, we may see a new gold standard in the digital imaging field – not only in smartphones but also in the movie industry.

Stacked Pixel Image Sensor with High Dynamic Range and Low Noise

The vast majority of currently used image sensors are complementary metal - oxide - semiconductor (CMOS) active pixel sensor (APS) monolithic arrays with 4T pixels. In these devices, each detector element (called a "pixel") includes a photodiode, a floating diffusion region, and four CMOS transistors, including a transfer gate, a reset gate, a selection gate, and a source follower readout transistor. The transfer gate controls the charge transfer from the photodiode to the floating diffusion region and enables noise reduction through correlated double sampling (CDS). Image sensors using 3T pixels (without a transfer gate) are easier to manufacture and less prone to artifacts but usually have higher noise.

Summary

The embodiments of the invention described below provide improved image sensors and methods for producing and controlling such image sensors.

Therefore, according to one embodiment of the invention, an image sensor is provided. The image sensor includes a logic chip containing a column readout circuit and bit lines connected to the column readout circuit, and a sensor chip overlying the logic chip. The image sensor includes an array of detector elements, each detector element including a sensing circuit disposed on the sensor chip and a pixel circuit disposed on the logic chip. The sensing circuit includes a photodiode having cathode and anode terminals, a floating diffusion node connected to one of the terminals of the photodiode, a reset transistor coupled between the floating diffusion node and a reset voltage, and a source follower transistor having an input connected to the floating diffusion node and an output. The pixel circuit includes a selection transistor having an input coupled to the output of the source follower and an output coupled to one of the bit lines, and a current memory circuit coupled to the input of the selection transistor and configured to sense and output a signal indicating the noise level in the detector element.

In some embodiments, each sensing circuit includes a lateral overflow integration capacitor (LOFIC) circuit, which includes one or more charge storage capacitors and one or more LOFIC transistors coupled between the floating diffusion node and the charge storage capacitors, where the reset transistor is coupled between the LOFIC circuit and the reset voltage. In one disclosed embodiment, the LOFIC circuit includes: a first charge storage capacitor having a first capacitance; a second charge storage capacitor having a second capacitance greater than the first capacitance; a first LOFIC transistor connected between the floating diffusion node and a first charge input terminal of the first charge storage capacitor; and a second LOFIC transistor connected between the first charge input terminal of the first charge storage capacitor and a second charge input terminal of the second charge storage capacitor. In one embodiment, the reset transistor is connected between the second charge input terminal of the second charge storage capacitor and the reset voltage. Additionally or alternatively, during the readout of the detector element to the bit line, the first and second LOFIC transistors are sequentially turned on while the selection transistor is turned on.

In some embodiments, during each image frame, the reset transistor is turned on during a first reset period to reset the floating diffusion node before the exposure period of the frame; the selection transistor is turned on during a first readout period after the exposure period to read out photo - charges from the floating diffusion node. Then, the reset transistor is turned on during a second reset period after the first selection period to reset the floating diffusion node; the selection transistor is turned on during a second readout period after the second reset period to read out the noise accumulated in the detector element.

In some embodiments, the current storage circuit includes at least one sampling capacitor and at least one sampling transistor coupled between the input of the selection transistor and the at least one sampling capacitor, where the at least one sampling transistor is turned on following the reset transistor during the first and second reset periods, such that the at least one sampling capacitor samples the kTC noise in the detector element. In the disclosed embodiment, the current storage circuit includes: a read transistor connected between the input of the selection transistor and the at least one sampling transistor; and a bias transistor in parallel with the read transistor and having a polarity opposite to that of the read transistor. The read transistor and the bias transistor are turned on during the first and second readout periods and turned off during the exposure period. In one embodiment, the bias transistor is turned on during the first and second reset periods.

Additionally or alternatively, the at least one sampling capacitor includes first and second sampling capacitors, and the at least one sampling transistor includes first and second sampling transistors, which are serially coupled between the first and second sampling capacitors and the input of the selection transistor.

According to one embodiment of the invention, an image sensing method is also provided. The method includes: providing a logic chip including a column readout circuit and bit lines connected to the column readout circuit; and overlaying a sensor chip on the logic chip. An array of detector elements is formed on the sensor chip and the logic chip, each detector element including a sensing circuit formed on the sensor chip and a pixel circuit formed on the logic chip. Each sensing circuit includes a photodiode having cathode and anode terminals, a floating diffusion node connected to one of the terminals of the photodiode, a reset transistor coupled between the floating diffusion node and a reset voltage, and a source follower transistor having an input connected to the floating diffusion node and an output. Each pixel circuit includes a selection transistor having an input coupled to the output of the source follower and an output coupled to one of the bit lines, and a current memory circuit coupled to the input of the selection transistor and configured to sense and output a signal indicating the noise level in the detector element.

A more comprehensive understanding of the invention will be obtained through the following detailed description of the embodiments of the invention in conjunction with the accompanying drawings:

Detailed Description of the Embodiments

The embodiments of the invention described herein provide an image sensor containing a novel 3T pixel design. This sensor can achieve high dynamic range, low noise, and avoid artifacts that may occur in traditional 4T pixel arrays. The image sensor includes a sensor chip stacked on a logic chip. Each 3T pixel contains a sensing circuit on the sensor chip, which includes a photodiode and a lateral overflow integration capacitor (LOFIC) circuit to sense under various lighting conditions from indoor to bright sunlight without the need for automatic exposure control. In addition, each pixel contains a pixel circuit on the logic chip, which includes a current storage circuit. The current storage circuit is used to sense the noise level in the detector element. The signal output by the current storage circuit can suppress thermal noise (kTC) using correlated double sampling (CDS).

Although the current storage circuit on the logic chip is particularly useful in conjunction with the LOFIC circuit, in other embodiments, the components on the logic chip can be used to reduce noise in other image sensor pixels even without the LOFIC circuit.

FIG. 1 is a schematic side view of an image sensor according to an embodiment of the invention;

FIG. 1 is a schematic side view of an image sensor 20 according to an embodiment of the invention. The image sensor 20 includes a logic chip 24 made of one silicon wafer and a sensor chip 22 made of another silicon wafer, which overlies the logic chip 24. The image sensor 20 includes an array of detector elements 26 (also called pixels), each detector element including a sensing circuit 28 located on the sensor chip 22 and a pixel circuit 30 located on the logic chip 24. The pixel circuit 30 is connected to