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Apple dropped two new chips overnight, doubling down on AI computers — are these two new Macs just the appetizer?

雷科技2026-08-27 10:21
Apple's New Ace in the Hole in the AI Era

Apple has updated its Mac lineup again.

On the evening of August 25, Apple suddenly launched the new Mac mini and Mac Studio. Their appearances barely changed, and even the product positioning is hardly unexpected: the Mac mini remains compact, exquisite and highly capable, while the Mac Studio is still the performance monster for professional users among desktop Macs.

That is, if you don't look at the price tag.

Image source: Apple

The starting price of the new Mac mini for the Chinese mainland market directly hits 6999 yuan. The starting price of the previous-generation M4 Mac mini was only 4499 yuan, even after the price was raised once this year due to storage upgrades (starting from 5999 yuan). But after one generation iteration, the entry threshold has been raised by a large margin.

The Mac Studio is even more exaggerated. The version equipped with M5 Max is already not cheap, and the truly top-tier M5 Ultra version has a starting price directly at 46999 yuan. If you further upgrade the memory and storage, the price can easily go straight to six figures.

Is Apple out of its mind?

But if you further study the products of this generation, you will find that Apple did not create a sense of presence simply by raising prices. The Mac mini debuts the brand-new M6, Apple's first 2nm chip; the Mac Studio brings the M5 Ultra, which is also the first chip in Apple's history that adopts a four-die architecture.

Since the launch of M1 in 2020, Apple Silicon, Apple's self-developed chip system based on ARM architecture, has gone through six years. The upgrade logic of Apple's chips in past generations is actually very clear: the CPU is a little faster, the GPU is a little more powerful, the manufacturing process advances gradually, and the scale is continuously expanded through Pro, Max and Ultra versions.

With the M6 and M5 Ultra, Apple has finally stepped into the 2nm era, readjusted the CPU core structure, and evolved the interconnection architecture from the interconnection of two large chips in the past to four dies that jointly form a single SoC.

At the same time, AI has begun to truly move to the center of chip design.

On the M6, Apple has finally entered the 2nm era

Let's first briefly introduce the parameter changes of the M6: the CPU increases from 10 cores to 12 cores, the GPU also increases from 10 cores to 12 cores, the memory bandwidth is increased from 153GB/s of the M5 to 170GB/s, and the Neural Engine is directly upgraded to two groups of 16 cores.

Parameters are one aspect, but what really deserves attention for the M6 lies in another aspect.

The first point is the 2nm process.

Since the M3, Apple has stayed at the 3nm process for three consecutive generations of M-series chips. The M3 adopted the first-generation 3nm process, while the M4 and M5 continuously improved the process. Until the M6, Apple finally stepped into the 2nm era, becoming the first 2nm chip in Apple's history.

Image source: Apple

Higher transistor density allows the M6 to achieve higher performance and energy efficiency in a smaller area. For users, the benefits can be summed up in two words:

Faster, more power-efficient.

According to data from TSMC, N2 (the first-generation 2nm process) can improve performance by up to about 15% at the same power consumption, and reduce power consumption by up to about 30% at the same performance, compared with N3E (the second-generation 3nm process).

Of course, this is the theoretical benefit of the process itself, and does not take into account architectural upgrades, which cannot be directly equated with the actual improvement of the M6. But it also explains a very important question: why Apple can stuff more CPU, GPU and AI units into the base M chip of this generation, while maintaining the power consumption and heat dissipation performance that small form factor machines like the Mac mini value most.

In other words, the 2nm process of the M6 not only increases the scores in performance benchmarks, but also frees up space for Apple to reallocate the performance overhead of the entire chip.

Apple first used this "space" on the CPU.

The CPU structure of the previous-generation M5 actually followed the consistent "big core + small core" idea of Apple Silicon. But for the M6, the 12 CPU cores are officially divided into three tiers: 2 Ultra cores, 4 Performance cores, and 6 Efficiency cores.

The middle tier of "Performance cores" is particularly special.

When Apple released the M5 Pro and M5 Max earlier this year, it had quietly redefined its CPU core system. The high-performance cores we were familiar with in the past were renamed "Ultra cores", and "Performance cores" were added as a new tier.

According to Apple, "Ultra cores" are dedicated to pursuing extreme single-threaded performance, while "Performance cores" deliver massive computing power at lower power consumption in multi-threaded tasks. On the M6, this architecture is deployed on the most entry-level M-series chips for the first time, with multi-threaded performance improved by up to 20% compared to the M5.

This is very characteristic of Apple. Especially when applied to the Mac mini, the machine is so small, and the power supply and heat dissipation capabilities have clear boundaries, so performance improvement must finally be calculated together with energy efficiency.

Image source: Apple

The GPU also has similar changes. The M6 increased the GPU from 10 cores to 12 cores. More importantly, starting from the M5, Apple stuffed a set of "neural network accelerators" into each GPU core, which is similar to the idea of NVIDIA's CUDA cores and Tensor cores.

The M6 also follows this design, where the GPU is responsible for both graphics processing and AI computing.

In fact, for large language models, image generation and other generative AI workloads, the importance of GPU is increasing rapidly. The larger the model size, the higher the required parallel computing and memory throughput, and the easier it is for the GPU to become the main computing force.

So Apple's current strategy is to retain the large-scale parallel computing that GPUs are good at, while adding dedicated "neural network accelerators" to each GPU core.

The GPU is still a GPU, but it is increasingly becoming a GPU specially modified for generative AI.

At the same time, the M6 is also equipped with two groups of 16-core Neural Engine for the first time, with the maximum computing power reaching twice that of the previous generation, and the system framework can automatically call both groups of Neural Engine at the same time.

These changes do not mean that the M6 has suddenly evolved from a consumer-grade chip to some kind of AI monster. The maximum unified memory is still only 32GB, and it is impossible to run a truly local "large" model with the 170GB/s bandwidth.

But the direction of the M6 is very clear. In the past, the base M chips solved the problem of "being fast enough for the vast majority of computer tasks". Starting from the M6, Apple has considered more about how the chip should allocate computing power when ordinary users run AI locally, call Agents, generate images, and run small and medium-sized models in the future.

To this end, Apple has almost restructured the three lines of CPU, GPU and AI at the same time.

And this is only the base model. On the M5 Ultra, this "super glue monster" made by Apple, Apple solves another kind of problem.

The M5 Ultra is the "super glue monster" built by Apple

How big can a single chip be? Take a direct look at the M5 Ultra:

It has up to 36-core CPU, 80-core GPU, 32-core Neural Engine, up to 512GB unified memory, with a bandwidth of 1.2TB/s.

Image source: Apple

Judging only by the number of CPU and GPU cores, the specs are not particularly shocking. The previous-generation M3 Ultra already had 32-core CPU and 80-core GPU, and 512GB unified memory was available long ago.

The point is that Apple connected four dies together for the first time.

Essentially, the M5 Ultra uses the new generation of UltraFusion interconnection technology to connect two dual-die M5 Max, and finally forms a four-die architecture that jointly constitutes a single SoC.

It sounds like the "glue trick". In fact, it can be understood in this way, except that this bottle of glue is extremely expensive, and the technical difficulty is far more complicated than simply putting four chips together.

Let's briefly explain why Apple did this.

In the past few decades, one of the most direct ways to improve chip performance is to make chips larger, stuff more transistors, more CPU and GPU cores into them. But chips cannot grow infinitely, as the exposure area of lithography machines has an upper limit. The larger the chip area on the same wafer, the higher the probability of encountering manufacturing defects:

Assuming there is a tiny defect on the wafer, if it falls next to a very small chip, only one chip may be scrapped. But if you are manufacturing a huge chip, the same defect may directly scrap the entire expensive large chip.

The larger the chip, the harder it is to control the yield, and the cost will naturally become increasingly staggering. Therefore, modern high-performance chips are increasingly popular to be "split into parts". AMD's Ryzen and EPYC have long adopted Chiplet on a large scale, and NVIDIA, Intel and Apple are all continuously developing towards multi-die packaging.

However, it is easy to split the design, but it is very difficult to combine them into "one single chip".

Because the data exchange speed inside the CPU and GPU is extremely fast, if the communication speed between the four dies is too slow, the CPU will need to wait when accessing data on another die, and the GPU will also generate latency when calling resources across dies, which will not be worth the loss in actual operation.

So the key lies in the UltraFusion chip-level interconnection technology.

The previous-generation M3 Ultra also adopted UltraFusion, but only connected two dies, with a low-latency bandwidth of more than 2.5TB/s between dies. For the M5 Ultra, with four dies working in coordination, Apple has directly increased the inter-die bandwidth to more than 4.4TB/s, and the connection density has also increased by more than 6 times.

4.4TB/s is even far higher than the 1.2TB/s unified memory bandwidth of the M5 Ultra itself. Coupled with ultra-low latency interconnection and software-hardware coordination, it can achieve a real "four-in-one" effect, no matter for software or users.

Image source: Apple

From the perspective of development direction, the four-die architecture also determines how future Apple Silicon can continue to become more powerful. If more CPU performance is needed in the future, more computing dies can be added. If larger GPU performance is needed, GPU resources can be further expanded.

Even in the more distant future, it is entirely possible for Apple to split computing, AI, I/O or other modules into different dies and then recombine them according to different products.

At the same time, AI is frantically consuming computing power and memory. The four-die architecture of the M5 Ultra almost perfectly meets the era that needs it most.

Positioned as an "agent computing tool", Apple is increasing investment in AI computers

"An all-day agent computing tool" is Apple's new positioning for the new Mac mini beyond the definition of "desktop computer".

Image source: Apple

Although there were signs long before, this is the first time Apple has explicitly labeled Mac with the AI tag. It not only directly mentions applications such as Claude Cowork, OpenClaw, Ollama, LM Studio Bionic on the English official website, but also directly writes Agent into the product definition of the M6 Mac mini.

The M5 Ultra goes even further, as Apple explicitly promotes the formation of clusters with multiple Mac Studio units as an AI capability. Through Thunderbolt 5 and RDMA, multiple machines can directly perform low-latency data exchange. When four Mac Studio units form a cluster, the distributed AI inference performance can reach up to 3 times that of a single machine.

In addition to hardware, software is also being completed.

Apple has launched a brand new Core AI framework this year, which is specially built for constructing, running and deploying local large models on Apple Silicon; MLX continues to be responsible for model training, fine-tuning and inference; JACCL is responsible for high-speed communication between multiple Mac units.

From chips, system frameworks to model tools, and then to multi-machine interconnection, a complete set of system has begun to take shape.

In the past, when Apple talked about Apple Silicon, the core has always been performance and energy efficiency. But for this generation, AI has truly entered the chip architecture, system software and even the product positioning of Mac:

Design Mac as a real AI computer.

The M6 is responsible for bringing this capability to the most common Macs, while the M5 Ultra is responsible for pushing Apple Silicon further towards more professional