After CXMT, Hefei Venture Capital Makes Another Move: This Time the Protagonist is LinkSemi

Not long ago, Changxin Technology's IPO application was approved, and the market widely expects its post-listing market capitalization to exceed one trillion yuan. This is also expected to push Hefei's total A-share market value from 1.5 trillion yuan to over 3 trillion yuan, surpassing Guangzhou and Hangzhou to become the fourth-largest nationwide.

"For the successful flower, people only admire its current bright splendor," yet Hefei's chip story goes far beyond that.

Over the past decade, Hefei has accomplished several major milestones in chip manufacturing: in addition to Changxin Technology's memory chips, there is also Jinghe Integration, which focuses on wafer foundry services and is now listed on the Sci-Tech Innovation Board.

Moving further downstream, packaging and testing enterprises such as Qizhong, Huicheng, Peidun, and Tongfu Microelectronics have also clustered in Hefei, while upstream players including Xinqiji Micro-Equipment, Xinyihua, and Andekemeng are filling gaps in equipment and materials sectors.

However, Hefei is not yet satisfied.

With the rise of large AI models, Hefei has keenly identified a missing link in the future chip industry chain: chips specifically designed for edge-side AI.

Essentially, current chips on the market, including NVIDIA's GPUs, were not originally built for AI. Even though NVIDIA later added specialized units like Tensor Cores and Transformer Engines, their underlying architecture remains GPU-based, fundamentally "designed for graphics and retrofitted for AI."

So, is there an enterprise that develops chips specifically for AI?

Recently, edge-side AI inference chip developer LingSi Technology completed a nearly 500 million yuan Series B financing round. This round was strategically led by multiple state-owned platforms from Anhui Province and Hefei, with follow-on investments from top-tier capital firms including Shenzhen Press Capital, Yingke Investment, Tianzhi Investment, Yongxin Ark, and Dongrui Investment, many of which are existing shareholders increasing their stakes.

Following the memory chip (Changxin) success, Hefei has keenly recognized the next industry trend:

That is "edge-side intelligence."

Why "Edge-Side Large Model Chips"?

In the past two years, the most prominent trend in the large model industry has been the race to expand parameters:

From hundreds of billions to trillions, models kept getting larger, but by this year, the tide has shifted.

The industry consensus has moved away from "the bigger the model, the better" to "the faster the model lands, the better." The next stage for large models will inevitably be integration with physical hardware.

Why are sectors like robots, AI PCs, smart cockpits, and whole-home smart systems so hot? Because these hardware products are the outlets for large models to move from "tech demonstrations" to practical applications, and are the products consumers interact with most frequently.

But to bring large models into end products, we must first resolve a practical contradiction: the vast majority of current smart devices rely on cloud connectivity to deliver intelligence. This "cloud-parasitic" architecture creates three critical bottlenecks:

First, the lack of offline capabilities.

In scenarios with weak or no network connections, the device's intelligent capabilities instantly collapse, degrading from a "smart terminal" to a "dumb terminal." For scenarios requiring continuous online perception such as smart homes, in-vehicle systems, and industrial inspections, this environmental adaptability failure is the biggest shortcoming preventing terminal experience upgrades.

In May 2025, a well-known domestic automaker's app experienced a large-scale service outage, causing remote start failures, electronic key malfunctions, inability to remotely close windows, and air conditioning preset failures, leaving hundreds of car owners digitally disconnected during the morning rush hour.

Second, the rigid constraint of real-time performance. Due to physical limitations, current end-to-end round-trip latency is still difficult to compress below the millisecond level. For multi-turn voice interactions in smart cockpits and real-time obstacle avoidance and path planning for robots, this transmission latency directly undermines the naturalness and continuity of interactions, leading to fragmented user experiences.

Third, the diseconomies of scale in inference costs. Long-term high-frequency calls to cloud-based large models incur token-based billing for every inference. An AI PC or smart cockpit terminal with hundreds of daily interactions could easily exceed the cost of the hardware itself in annual usage expenses. This economic model where "marginal inference costs cannot converge" fundamentally limits the large-scale popularization of edge-side intelligence.

For large-scale deployed smart terminals, this represents a bottomless cost pit, and consumers are unlikely to sustain such expenses. Coupled with issues like data privacy and cybersecurity, the industry is increasingly recognizing that:

For large models to truly enter thousands of households, they must move down from the cloud and deeply integrate with end devices.

This is the logic behind the birth of "edge-side large models": embedding the inference capabilities of large models directly into a single chip, enabling devices to complete understanding, reasoning, and decision-making locally.

The Edward Stanley team at Morgan Stanley stated in a 2024 research report:

Edge-side AI will take the "center stage" of the consumer electronics market in the second half of 2024 and 2025. Following smartphones, AI laptops will also experience explosive growth, with AI PC penetration rates surging from 8% in 2024 to 30% and 50% by 2025-2026, bringing approximately $30 billion in revenue growth to global semiconductor companies from this segment alone.

Therefore, over the past 1-2 years, many leading tech companies have invested significant efforts in researching edge-side chips.

At WWDC 2024, Apple positioned Apple Intelligence's foundation entirely on the edge side. Tim Cook's exact words were: "Apple Intelligence is one of the biggest software platform transformations in iPhone history." In Apple's architectural design, the main AI workload should run on the edge side (A17 Pro/M4 and later NPUs), with only tasks requiring larger models routed to private clouds—what can run on the edge will never be sent to the cloud.

In 2025, Apple continued to boost NPU computing power, making "running large models on the edge" a key selling point for MacBooks and iPhones.

By 2026, Jensen Huang of NVIDIA also announced entry into the PC processor market, unveiling the RTX Spark platform in partnership with Microsoft, Arm, and MediaTek. An Omdia analyst commented at the time:

"NVIDIA's entry into the PC market marks the starting point and vane of the edge-side AI boom, ushering in the full era of AI inference."

Reportedly, LingSi Technology's latest fundraising is also dedicated to developing a new generation of edge-side large model AI inference chips, promoting the launch of LingSi's first edge-side large model AI inference chip Nebula series (scheduled for official release at the end of 2026), to provide core computing power support for the large-scale deployment of edge-side large models in terminal scenarios such as robots, AI PCs, smart cockpits, and whole-home smart systems.

What Makes LingSi Stand Out?

Having the right direction is one thing, but specific investment decisions matter—why did Hefei choose LingSi?

The reason is that this enterprise has long been operating in the edge-side AI chip track and has achieved tangible results.

Let's start with a few key numbers: LingSi's cumulative shipments have exceeded 100 million units. In the edge-side NPU chip industry, companies that can reach this shipment volume can be counted on one hand.

Looking at its technical roadmap, LingSi's choices differ from most other chip companies.

There are many domestic enterprises developing edge-side AI chips. Traditional chip companies typically follow the "algorithm adapts to chip" path: first building a general-purpose chip architecture, then porting AI algorithms onto it, resulting in low efficiency and high power consumption. LingSi takes a different approach: co-designing chips and algorithms, deriving the chip architecture from the algorithm source to maximize computing power efficiency.

LingSi's current neural processing unit (NPU) can achieve an 80% computing power utilization rate, while the industry average is only 30%-50%.

This means that with the same nominal computing power, LingSi can deliver 5-10 times the algorithm performance on end devices compared to competitors. This is a decisive advantage for scenarios like home appliances, automotive systems, and educational hardware, which are highly sensitive to costs and power consumption.

In fact, leading white goods manufacturers such as Haier and Midea have been large purchasers of LingSi's chip products. Especially in the Bluetooth voice interaction field, LingSi already holds the top market share. The home appliance industry features low unit prices, massive shipment volumes, and extreme sensitivity to costs and power consumption. Securing a leading position in this sector fully demonstrates LingSi's technical capabilities.

Computer vision has become LingSi's second growth curve in recent years.

In the past, major buyers of vision chips were typically security enterprises, a track that has become highly saturated. However, LingSi avoided direct competition in this red ocean by integrating vision with AI into emerging scenarios like education, consumer electronics, and smart homes, successfully carving out a blue ocean market.

For example, in educational hardware like scanning pens, consumer electronics such as handheld gimbals and action cameras, and smart home devices like smart locks and robotic vacuums—scenarios that previously either made do with general-purpose chips or relied on cloud processing—LingSi's integration of local visual AI capabilities enables offline facial recognition, gesture control, human tracking, and other functions to run on low-power devices. These application solutions have been adopted by multiple leading brands, with shipment volumes consistently ranking at the top of the industry.

In short, in the two key areas of "enabling devices to understand human speech and perceive the world visually," LingSi has established itself as one of the most competitive companies in the industry.

With this round of financing, LingSi's planned edge-side large model AI inference chips represent another upgrade based on its existing voice and visual capabilities, allowing end devices to not only "understand and perceive" but also "comprehend and reason."

However, this path is far from easy.

The industry widely recognizes three major barriers to running large models on the edge: the memory wall, power consumption wall, and cost wall.

Cloud-based GPU chips typically consume hundreds of watts of power, rely on liquid cooling for heat dissipation, and cost tens of thousands of yuan—completely impractical for direct deployment on end devices. Yet most existing edge-side AI chips on the market are still designed for traditional machine learning models, performing adequately with CNN and RNN architectures but struggling significantly when running Transformer-based generative large models, resulting in poor adaptability and dismal energy efficiency. The fundamental reason is that there is currently no chip on the market truly developed specifically for large models.

LingSi aims to solve this problem at its root by focusing on three core initiatives.

The first is utilizing 3D-DRAM stacking technology to break through the limitations of traditional HBM technology in edge-side deployments, enabling memory bandwidth several times or even ten times higher than existing solutions, achieving large-capacity memory with processing-in-memory integration, thereby realizing leaps in inference performance and energy efficiency.

Notably, this chip will be produced using wafer bonding based on Changxin's 3D DRAM process, marking the first deep collaboration between two Hefei-based local enterprises in the memory and inference segments.

The second is deepening the software-hardware co-design of chips and algorithms. Over the past decade, edge-side AI chips have primarily been designed for the CNN (Convolutional Neural Network) era. At that time, tasks were limited to image classification, object detection, and voice wake-up, with small models and intensive computing requirements—NPUs could perform well by simply stacking multiply-accumulate units and hardening convolution operators.

But large models operate under different rules. The Transformer architecture requires weight transfers for each computation layer, featuring long sequences and diverse operator forms. Traditional NPUs that ran CNNs like "small horses pulling small carts" now struggle to pull the much heavier Transformer load. LingSi's Nebula chip is equipped with an AI-native NPU designed specifically for large model inference, reverse-defining the computing architecture based on the algorithmic characteristics of large models to make the NPU more optimized for Transformer-type computations. With the same nominal computing power, Nebula can deliver higher effective throughput and lower latency.

Based on these two core innovations, the Nebula series chips are expected to achieve a 10x improvement in computing acceleration performance, support 10x larger model parameter sizes, and deliver inference speeds exceeding 100 tokens/s, reaching global leading levels in performance, energy efficiency, and form factor.

The third initiative is packaging the chip as a complete "solution package" that customers can use out of the box.

A chip is not just hardware—it requires mature toolchains, SDKs, and reference designs. With cumulative shipments of 150 million chips, LingSi clearly understands that customers need ready-to-use products, so it completes porting and adaptation tools for customers before shipment.

On the market front, LingSi Technology has already launched joint pre-research initiatives with enterprises including Lenovo, Lingdong Robotics, Haier, Midea, and Mianbi in four key areas: AI PCs, robots, smart homes, and smart cockpits, promoting the industrial implementation of edge-side large model AI inference chips in real terminal scenarios.

Capital Is Willing to "Pay Double"

When evaluating chip companies for potential IPOs, the primary market focuses on three key factors:

Track sector, market position, and growth story.

First, the sector must be at the right temporal juncture. Today's edge-side large model chips are no longer a "nice-to-have"—they are a "must-have."

Because products in sectors like robots, AI PCs, smart cockpits, and whole-home smart systems need to balance three critical financial considerations.

The first consideration is "offline usability." When a vehicle enters a tunnel, a smart home loses Wi-Fi and switches to 4G, a robot enters an elevator, or an outdoor lawnmower reaches the edge of a residential area—online connectivity becomes difficult, and the ability to operate offline is the norm.

The second consideration is "privacy and compliance." Family conversations, in-car discussions, child companion data, and elderly care imagery—sensitive data that was previously sent to the cloud for