NVIDIA has invested in Arm's competitor.
On April 10th, Xin Dongxi reported that last night, SiFive, the leading U.S. RISC-V processor IP company, announced that it had completed an oversubscribed Series G financing round, raising $400 million (approximately RMB 2.7 billion). After the investment, its valuation reached $3.65 billion (approximately RMB 24.9 billion), and it will accelerate the development of its RISC-V CPU and AI IP solutions for data centers.
This equity financing round was led by Atreides Management. Other top-tier investors include Apollo Global Management, NVIDIA, Point72 Turion, and T. Rowe Price Investment Management, Inc., as well as Prosperity7 Ventures and Sutter Hill Ventures, which had previously participated in this financing round.
SiFive CEO Patrick Little told foreign media that he expects this to be the last financing round before SiFive submits an IPO application.
Previously, industry giants such as Qualcomm, Western Digital, Intel, and SK Hynix were all investors in SiFive.
01
The competition in the data center CPU market is becoming increasingly fierce. Even Arm, which has long dominated the semiconductor IP market, launched a self-developed data center CPU product last month.
SiFive was founded in 2015 by the inventors of RISC-V. Its aim is to end the decades-long closed proprietary hardware ecosystem and bring the power and flexibility of RISC-V to the world, thereby transforming the future of computing.
RISC-V is an open-source instruction set architecture regulated by a non-profit foundation. It belongs to the reduced instruction set processor architecture, just like Arm, but unlike Arm's chip technology, it is not controlled by a single company.
The members of the RISC-V International organization include hundreds of institutions and technology giants such as NVIDIA, Qualcomm, Microsoft, and Google, and there are relevant courses in top universities around the world.
Patrick Little believes that Arm's new strategic direction creates opportunities for SiFive to win new customers.
Over the past decade, RISC-V has continued to grow and expand. In the embedded market, SiFive has established a solid foothold, helping AI move to the edge. SiFive achieved record growth in 2025. Its IP has been applied in more than 500 designs, and more than 10 billion cores have been shipped to date.
Now, SiFive is setting its sights on the most demanding computing infrastructure - data centers.
SiFive's third-generation high-performance CPU IP, P870-D, has been put into use in customer chips. Its design goal is to compete fiercely with Arm Neoverse N2 series processors in the data center field. The P870-D marks the beginning of the era of high-performance data center RISC-V CPUs.
A brand-new fourth-generation SiFive Performance IP, specifically designed for the top performance of data center CPUs, is also under development.
Several data centers have already cooperated with SiFive to jointly develop next-generation products.
02
SiFive's cooperation with NVIDIA is deepening continuously.
In January this year, SiFive announced that it would integrate NVIDIA NVLink Fusion into its future designs, becoming the first RISC-V chip company to cooperate with NVIDIA on interconnection technology. This means that NVIDIA GPUs can be directly connected to SiFive RISC-V CPUs through high-bandwidth interconnection.
NVIDIA's investment in SiFive may be aimed at further bringing the RISC-V ecosystem into its data center layout.
The $400 million Series G financing will enable SiFive to accelerate the development of its next-generation data center solutions and expand its global engineering team to meet the needs of AI workloads.
SiFive Chairman and CEO Patrick Little said that hyperscale customers have indicated that it is time to accelerate the popularization of open standard alternatives for data centers. They require CPU solutions in the form of customizable IP to significantly enhance the differentiation advantages of their data center computing solutions, and RISC-V is the only architecture that can truly meet these needs.
SiFive believes that now is the best time to accelerate investment in the high-performance data center CPU roadmap. It hopes to replace complex and power-hungry traditional architectures with modern RISC-V CPUs with lower power consumption. Its investment priorities include:
Advanced R & D: Expand the roadmap for high-performance scalar, vector, and matrix RISC-V CPUs, accelerators, and system IP.
Software ecosystem: Accelerate data center software development on the SiFive platform, based on existing CUDA, RedHat, and Ubuntu ported versions.
Customer enablement: Collaborate closely with customers and industry leaders to simplify their deployment paths, such as NVIDIA NVLink Fusion.
RISC-V integrates scalar, vector, and matrix computing into a single standard-based interface, helping customers quickly scale up and speed up hardware development.
Yunsup Lee, co-founder and CTO of SiFive, explained why SiFive is the solution for the next generation of AI:
The transformation to agent AI requires a fundamental rethinking of data centers and elastic computing that can handle complex branch logic while maintaining extremely high energy efficiency.
With its unique design approach, SiFive can optimize and simplify according to customers' workload requirements, making it very suitable for the $100 billion agent CPU market.
The engine that SiFive is building will enable AI agents to expand economically and efficiently on a global scale without causing damage to the power grid.
Dave Altavilla, the chief analyst at HotTech Vision and Analysis, believes that hyperscale data center operators, chip suppliers, and ecosystem partners are collaborating with SiFive to develop highly customizable CPU IP. If this momentum can be maintained and SiFive can achieve its goals, they will have a clear path to participate in the huge market opportunity of the next generation of AI and intelligent data center infrastructure, which may exceed $100 billion in scale.
This article is from the WeChat official account “Xin Dongxi”, written by ZeR0, and published by 36Kr with authorization.